Traffic-light-controller-using-verilog

The main objective of this project is to design and implement a Traffic Light Controller using a FSM in Verilog, simulating a traffic light controller for an intersection with four roads. The system operates based on a finite-state machine with a fixed time for green, yellow, and red lights for each road. This system is implemented on an FPGA to control the traffic lights in real-time.Tools used-vivado,Fpga Board-Artix-7