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| 1 | +/* |
| 2 | + * Copyright (c) 2025 Renesas Electronics Corporation |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#define DT_DRV_COMPAT renesas_ra_dac |
| 8 | + |
| 9 | +#include <zephyr/drivers/dac.h> |
| 10 | +#include <zephyr/drivers/pinctrl.h> |
| 11 | +#include <zephyr/logging/log.h> |
| 12 | +#include "r_dac_api.h" |
| 13 | +#include "r_dac.h" |
| 14 | + |
| 15 | +LOG_MODULE_REGISTER(dac_renesas_ra, CONFIG_DAC_LOG_LEVEL); |
| 16 | + |
| 17 | +struct dac_renesas_ra_config { |
| 18 | + const struct pinctrl_dev_config *pcfg; |
| 19 | +}; |
| 20 | + |
| 21 | +struct dac_renesas_ra_data { |
| 22 | + const struct device *dev; |
| 23 | + dac_instance_ctrl_t dac; |
| 24 | + struct st_dac_cfg f_config; |
| 25 | +}; |
| 26 | + |
| 27 | +static int dac_renesas_ra_write_value(const struct device *dev, uint8_t channel, uint32_t value) |
| 28 | +{ |
| 29 | + struct dac_renesas_ra_data *data = dev->data; |
| 30 | + fsp_err_t fsp_err; |
| 31 | + |
| 32 | + if (channel != 0) { |
| 33 | + LOG_ERR("wrong channel id '%hhu'", channel); |
| 34 | + return -ENOTSUP; |
| 35 | + } |
| 36 | + |
| 37 | + fsp_err = R_DAC_Write(&data->dac, value); |
| 38 | + if (FSP_SUCCESS != fsp_err) { |
| 39 | + return -EIO; |
| 40 | + } |
| 41 | + |
| 42 | + return 0; |
| 43 | +} |
| 44 | + |
| 45 | +static int dac_renesas_ra_channel_setup(const struct device *dev, |
| 46 | + const struct dac_channel_cfg *channel_cfg) |
| 47 | +{ |
| 48 | + struct dac_renesas_ra_data *data = dev->data; |
| 49 | + dac_extended_cfg_t *config_extend = (dac_extended_cfg_t *)data->f_config.p_extend; |
| 50 | + fsp_err_t fsp_err; |
| 51 | + |
| 52 | + if (channel_cfg->channel_id != 0) { |
| 53 | + LOG_ERR("wrong channel id '%hhu'", channel_cfg->channel_id); |
| 54 | + return -ENOTSUP; |
| 55 | + } |
| 56 | + |
| 57 | + if (channel_cfg->resolution != 12) { |
| 58 | + LOG_ERR("Resolution not supported"); |
| 59 | + return -ENOTSUP; |
| 60 | + } |
| 61 | + |
| 62 | + if (data->dac.channel_opened != 0) { |
| 63 | + fsp_err = R_DAC_Close(&data->dac); |
| 64 | + if (FSP_SUCCESS != fsp_err) { |
| 65 | + return -EIO; |
| 66 | + } |
| 67 | + } |
| 68 | + |
| 69 | +#if DT_PROP(DT_PARENT(DT_DRV_INST(0)), has_output_amplifier) |
| 70 | + config_extend->output_amplifier_enabled = channel_cfg->buffered; |
| 71 | +#elif DT_PROP(DT_PARENT(DT_DRV_INST(0)), has_chargepump) |
| 72 | +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(moco)) |
| 73 | + config_extend->enable_charge_pump = channel_cfg->buffered; |
| 74 | +#else |
| 75 | + if (channel_cfg->buffered) { |
| 76 | + LOG_ERR("Requires MOCO clock enabled to support the buffer feature"); |
| 77 | + return -ENOTSUP; |
| 78 | + } |
| 79 | +#endif |
| 80 | +#else |
| 81 | + if (channel_cfg->buffered) { |
| 82 | + LOG_ERR("The MCU doesn't support the buffer feature"); |
| 83 | + return -ENOTSUP; |
| 84 | + } |
| 85 | +#endif |
| 86 | + |
| 87 | +#if DT_PROP(DT_PARENT(DT_DRV_INST(0)), has_internal_output) |
| 88 | + config_extend->internal_output_enabled = channel_cfg->internal; |
| 89 | +#else |
| 90 | + if (channel_cfg->internal) { |
| 91 | + LOG_ERR("The MCU doesn't support the internal output feature"); |
| 92 | + return -ENOTSUP; |
| 93 | + } |
| 94 | +#endif |
| 95 | + |
| 96 | + fsp_err = R_DAC_Open(&data->dac, &data->f_config); |
| 97 | + if (FSP_SUCCESS != fsp_err) { |
| 98 | + return -EIO; |
| 99 | + } |
| 100 | + |
| 101 | + fsp_err = R_DAC_Start(&data->dac); |
| 102 | + if (FSP_SUCCESS != fsp_err) { |
| 103 | + return -EIO; |
| 104 | + } |
| 105 | + |
| 106 | + return 0; |
| 107 | +} |
| 108 | + |
| 109 | +static int dac_renesas_ra_init(const struct device *dev) |
| 110 | +{ |
| 111 | + const struct dac_renesas_ra_config *config = dev->config; |
| 112 | + int ret; |
| 113 | + |
| 114 | + ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); |
| 115 | + if (ret < 0) { |
| 116 | + return ret; |
| 117 | + } |
| 118 | + |
| 119 | + return 0; |
| 120 | +} |
| 121 | + |
| 122 | +static DEVICE_API(dac, dac_renesas_ra_api) = { |
| 123 | + .channel_setup = dac_renesas_ra_channel_setup, |
| 124 | + .write_value = dac_renesas_ra_write_value, |
| 125 | +}; |
| 126 | + |
| 127 | +#ifdef CONFIG_DAC_RENESAS_RA_DAVREFCR_AVCC0_AVSS0 |
| 128 | +#define DAC_RENESAS_RA_DAVREFCR DAC_VREF_AVCC0_AVSS0 |
| 129 | +#elif defined(CONFIG_DAC_RENESAS_RA_DAVREFCR_VREFH_VREFL) |
| 130 | +#define DAC_RENESAS_RA_DAVREFCR DAC_VREF_VREFH_VREFL |
| 131 | +#elif defined(CONFIG_DAC_RENESAS_RA_DAVREFCR_NONE) |
| 132 | +#define DAC_RENESAS_RA_DAVREFCR DAC_VREF_NONE |
| 133 | +#else |
| 134 | +#define DAC_RENESAS_RA_DAVREFCR 0 |
| 135 | +#endif |
| 136 | + |
| 137 | +#define DAC_RENESAS_RA_INIT(idx) \ |
| 138 | + PINCTRL_DT_INST_DEFINE(idx); \ |
| 139 | + static dac_extended_cfg_t g_dac_cfg_extend_##idx = { \ |
| 140 | + .data_format = DAC_DATA_FORMAT_FLUSH_RIGHT, \ |
| 141 | + .enable_charge_pump = true, \ |
| 142 | + .output_amplifier_enabled = true, \ |
| 143 | + .internal_output_enabled = false, \ |
| 144 | + .ref_volt_sel = DAC_RENESAS_RA_DAVREFCR, \ |
| 145 | + }; \ |
| 146 | + static const struct dac_renesas_ra_config dac_renesas_ra_config_##idx = { \ |
| 147 | + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \ |
| 148 | + }; \ |
| 149 | + static struct dac_renesas_ra_data dac_renesas_ra_data_##idx = { \ |
| 150 | + .dev = DEVICE_DT_INST_GET(idx), \ |
| 151 | + .f_config = \ |
| 152 | + { \ |
| 153 | + .channel = DT_INST_REG_ADDR(idx), \ |
| 154 | + .ad_da_synchronized = \ |
| 155 | + IS_ENABLED(CONFIG_DAC_RENESAS_RA_DA_AD_SYNCHRONIZE), \ |
| 156 | + .p_extend = &g_dac_cfg_extend_##idx, \ |
| 157 | + }, \ |
| 158 | + }; \ |
| 159 | + \ |
| 160 | + DEVICE_DT_INST_DEFINE(idx, dac_renesas_ra_init, NULL, &dac_renesas_ra_data_##idx, \ |
| 161 | + &dac_renesas_ra_config_##idx, POST_KERNEL, CONFIG_DAC_INIT_PRIORITY, \ |
| 162 | + &dac_renesas_ra_api) |
| 163 | + |
| 164 | +DT_INST_FOREACH_STATUS_OKAY(DAC_RENESAS_RA_INIT); |
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