GitHub - Moamenhimself/uart-controller: This is a part of a Computer arcitecture project which is implementing a GPIO controller and UART controller connected to the APB bus in Verilog.

Moamenhimself / uart-controller Public

This is a part of a Computer arcitecture project which is implementing a GPIO controller and UART controller connected to the APB bus in Verilog.

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Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
Baudrategenerator_tb.v		Baudrategenerator_tb.v
Oversampling_tb.v		Oversampling_tb.v
Receiver_tb.v		Receiver_tb.v
Transmitter_tb.v		Transmitter_tb.v
uart_controller.v		uart_controller.v

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This is a part of a Computer arcitecture project which is implementing a GPIO controller and UART controller connected to the APB bus in Verilog.

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