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AMPA_APB4_Protocol
AMPA_APB4_Protocol PublicThis Repository contains the Implementation of the AMBA APB4 Protocol with Verilog, featuring an APB master, APB slave with cache memory, and comprehensive testbenches. Includes scripts for fast siโฆ
Verilog 2
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Python-for-Everybody-Specialization
Python-for-Everybody-Specialization PublicThis repository contains all the code and exercises I complete as part of the Python for Everybody course on Coursera, designed by Dr. Charles Severance
Python 1
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SPI_Slave_With_Single_Port_Memory
SPI_Slave_With_Single_Port_Memory PublicThis repository contains the implementation of an SPI (Serial Peripheral Interface) communication protocol with sigle port sync RAM. The project includes the design and code for an SPI Slave, a sinโฆ
Verilog 5
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FIFO-Verification
FIFO-Verification PublicThis Repository contains the verification of a Synchronous FIFO design using SystemVerilog and SystemVerilogAssertions
SystemVerilog 3
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