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@inocsin inocsin commented Nov 10, 2025

Summary by CodeRabbit

  • Refactor
    • Tuned kernel optimization configurations to improve inference performance for grouped matrix operations on compatible GPU architectures.

Description

Fix the ada fp8 group gemm bug of lacks shared memory when initialization

During the preparation phase before real tuning happens, a fallback tactic is used. In the ada fp8 groupgemm case, the default tile shape config with stage >= 3 will incure lacks shared memory issue. So we replace the defualt config with another one that is guaranteed to be valid under any circumstances

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Signed-off-by: Vincent Zhang <vinczhang@nvidia.com>
@inocsin inocsin requested a review from a team as a code owner November 10, 2025 11:36
@inocsin inocsin requested review from djns99, hyukn and kaiyux November 10, 2025 11:37
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📝 Walkthrough

Walkthrough

Modified FP8 GROUPED_GEMM kernel tile configuration heuristics for SM 89 and SM >= 120 in CUTLASS. Reordered candidate tile shapes and added additional configurations to the selection priority order.

Changes

Cohort / File(s) Change Summary
CUTLASS Heuristic Tile Configuration Reordering
cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp
Reordered and modified FP8 GROUPED_GEMM tile configurations for SM 89 and SM >= 120; moved CtaShape16x256x128_WarpShape16x64x128 from first to last position; reordered remaining configurations and added intermediate variants (CtaShape64x128x64_WarpShape64x32x64, CtaShape64x64x128_WarpShape32x64x64, etc.) in priority sequence

Estimated code review effort

🎯 2 (Simple) | ⏱️ ~8 minutes

  • Note: While the code change is straightforward (data reordering), reviewers should verify the rationale behind the new tile configuration priority order and confirm performance implications for FP8 GROUPED_GEMM operations on the affected SM versions.

Pre-merge checks and finishing touches

❌ Failed checks (1 warning, 1 inconclusive)
Check name Status Explanation Resolution
Docstring Coverage ⚠️ Warning Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. You can run @coderabbitai generate docstrings to improve docstring coverage.
Description check ❓ Inconclusive The description explains the issue (shared memory problem during initialization) and solution (replacing problematic default config), but lacks details on test coverage and checklist items are incomplete. Provide specific test cases or validation methods that confirm the fix resolves the shared memory issue and does not regress other configurations.
✅ Passed checks (1 passed)
Check name Status Explanation
Title check ✅ Passed The title clearly identifies the fix for a specific Ada FP8 grouped GEMM shared memory issue and includes proper ticket reference and type tag.
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  • cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp (1 hunks)
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🧠 Learnings (7)
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Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4616-4626
Timestamp: 2025-08-19T03:35:20.866Z
Learning: In the MOE profiler TMA workspace preparation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu), the overlapping of TMA WS regions for NONE and FINALIZE variants is deliberate design to save memory space, as confirmed by djns99. The comment "reuse the same pointers to save space" reflects this intentional behavior.
📚 Learning: 2025-08-09T20:57:04.084Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_tma_warp_specialized_input.cu:118-127
Timestamp: 2025-08-09T20:57:04.084Z
Learning: In the CUTLASS MoE finalize fusion implementation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_tma_warp_specialized_input.cu), when setting `fused_finalize_epilogue.stride_final_output` with shape `(hidden_size, num_output_tokens, 1)`, the `num_rows_in_final_output` should be set to `num_output_tokens` (not `hidden_size`) because of a swap+transpose operation that maps rows of the output tensor to `hidden_size` and columns to `num_output_tokens`.

Applied to files:

  • cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp
📚 Learning: 2025-08-08T22:03:40.707Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.

Applied to files:

  • cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp
📚 Learning: 2025-08-22T01:54:35.850Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h:999-1000
Timestamp: 2025-08-22T01:54:35.850Z
Learning: The `internal_cutlass_kernels` directory in TensorRT-LLM is a mirror of an internal NVIDIA repository and maintains its own implementation and API that may diverge from the public `cutlass_kernels` version. API inconsistencies between these two directories are intentional and by design, not bugs to be fixed.

Applied to files:

  • cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp
📚 Learning: 2025-08-21T21:48:35.135Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:399-417
Timestamp: 2025-08-21T21:48:35.135Z
Learning: CUTLASS extensions in TensorRT-LLM (located under cpp/tensorrt_llm/cutlass_extensions/) are designed to integrate with and extend functionality in the external CUTLASS repository. When analyzing these extensions, their consumers and functionality wiring may exist in the CUTLASS codebase rather than within TensorRT-LLM itself.

Applied to files:

  • cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp
📚 Learning: 2025-08-19T03:35:20.866Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4616-4626
Timestamp: 2025-08-19T03:35:20.866Z
Learning: In the MOE profiler TMA workspace preparation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu), the overlapping of TMA WS regions for NONE and FINALIZE variants is deliberate design to save memory space, as confirmed by djns99. The comment "reuse the same pointers to save space" reflects this intentional behavior.

Applied to files:

  • cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp
📚 Learning: 2025-09-19T21:28:13.751Z
Learnt from: jhaotingc
Repo: NVIDIA/TensorRT-LLM PR: 7856
File: cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp:159-166
Timestamp: 2025-09-19T21:28:13.751Z
Learning: In TensorRT-LLM blockScaleMoe routing (cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu), the DeepSeek routing method performs reinterpret_cast<float*>(routingLogits) at line 89, which could cause issues if routing_logits are BF16. However, Qwen3-FP8 models use RenormalizeNaive routing method and are not affected by this dtype casting issue.

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  • cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp
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🔇 Additional comments (1)
cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp (1)

180-187: Fix correctly addresses shared memory exhaustion issue—verified by test evidence.

The reordering moves CtaShape16x256x128_WarpShape16x64x128 to the end of candidate configurations, reducing its priority during selection. Test evidence confirms this is the right approach: the test at cpp/tests/unit_tests/kernels/mixtureOfExpertsTest.cu:1128-1129 explicitly marks this configuration as failing when used with FP8 and stages >= 3 due to shared memory constraints.

The fix:

  • Does not remove the configuration—it remains available as a fallback option
  • Makes both GROUPED_GEMM (line 186) and non-GROUPED_GEMM (line 209) paths consistent
  • Prevents selection of this memory-intensive configuration as a default candidate, only attempting it if other options exhaust
  • Aligns with dedicated kernel implementations (moe_gemm_template_dispatch.h:420, fp8_rowwise_gemm_template.h:294) that remain unchanged

The change is sound and addresses the documented failure condition.


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inocsin commented Nov 11, 2025

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PR_Github #24076 [ run ] triggered by Bot. Commit: 6d91832

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PR_Github #24076 [ run ] completed with state SUCCESS. Commit: 6d91832
/LLM/release-1.1/L0_MergeRequest_PR pipeline #470 completed with status: 'SUCCESS'

@kaiyux kaiyux merged commit 08f8f96 into NVIDIA:release/1.1 Nov 11, 2025
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