Escaped identifiers

[skimmmer]

First off, thanks for creating a nice verilog parser and AST!

I've noticed some issues when parsing escaped identifiers such as:
\wire_name.A[0]

Where I get a parser error because of the ".". Are escaped identifiers supported?

[shtaxxx]

Thanks for using Pyverilog!

The previous vparser did not support escaped identifiers. The current version of vparser and AST-to-code generator support it.