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1bd035d
[offload] defer "---> olInit" trace message (#167893)
lplewa Nov 13, 2025
a12600c
[flang][NFC] Strip trailing whitespace from tests (4 of N)
tarunprabhu Nov 13, 2025
e5c418f
[NFC][TableGen] Adopt CodeGenHelpers in SubtargetEmitter (#163820)
jurahul Nov 13, 2025
e1324a9
Revert "[Flang][OpenMP] Update declare mapper lookup via use-module" …
TIFitis Nov 13, 2025
6a0ba8b
[CIR] Prepare a 'this' for CXXDefaultInitExprs (#165994)
AmrDeveloper Nov 13, 2025
a04c6b5
[LV] Update LoopVectorizationPlanner::emitInvalidCostRemarks to handl…
bababuck Nov 13, 2025
f7e6521
[compiler-rt][ARM] Optimized mulsf3 and divsf3 (#161546)
statham-arm Nov 13, 2025
12322b2
[AArch64][SVE] Allow basic use of `target("aarch64.svcount")` with +s…
MacDue Nov 13, 2025
c78fb8d
[ADT] Simplify SmallDenseMap::grow (NFC) (#167829)
kazutakahirata Nov 13, 2025
0acdbd5
[InstrRef] Consistently use MLocTracker::getLocID() before calling lo…
topperc Nov 13, 2025
d6703bb
[GISel][AArch64] Create emitCMP instead of cloning a virtual register…
AZero13 Nov 13, 2025
89c08ad
[lldb] Add a gtest matcher for lldb_private::Value (#167427)
dmpots Nov 13, 2025
ea16f7d
[libcxx] Fix xsgetn in basic_filebuf (#167779)
michaelrj-google Nov 13, 2025
e63a47d
[RISCV][llvm] Handle INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT codegen fo…
4vtomat Nov 13, 2025
fb2563d
[BPF] add allows-misaligned-mem-access target feature (#167013)
clairechingching Nov 13, 2025
39fbec0
[AArch64][llvm] Improve writeback reg handling for FEAT_MOPS (#167763)
jthackray Nov 13, 2025
1c19645
Revert "[compiler-rt][ARM] Optimized mulsf3 and divsf3" (#167906)
statham-arm Nov 13, 2025
de3d74a
[CIR] Implement support for GNUNullExpr (#167715)
AmrDeveloper Nov 13, 2025
6b49e6a
[libc][NFC] Fix warnings in RPC server code
jhuber6 Nov 13, 2025
09122fe
Clang: Remove `-Wperf-constraint-implies-noexcept` from `-Wall`. (#16…
dougsonos Nov 13, 2025
e0aec1f
[RISCV] For (2^N +/- 2^M) muls, prefer ADD to SUB (#166757)
pfusik Nov 13, 2025
98f9b54
[CodeGen] Hide SparseSet<LiveRegUnit> behind a typedef (NFC) (#167898)
s-barannikov Nov 13, 2025
9216e17
[CIR] Upstream basic support for ExtVector element expr (#167570)
AmrDeveloper Nov 13, 2025
8d6a1de
[SelectionDAGISel] Don't merge input chains if it would put a token f…
topperc Nov 13, 2025
d1cc137
[CodeGen] Add TRI::regunits() iterating over all register units (NFC)…
s-barannikov Nov 13, 2025
a5d2b37
merge main into amd-staging
ronlieb Nov 14, 2025
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2 changes: 2 additions & 0 deletions clang/docs/ReleaseNotes.rst
Original file line number Diff line number Diff line change
Expand Up @@ -602,6 +602,8 @@ Improvements to Clang's diagnostics
Moved the warning for a missing (though implied) attribute on a redeclaration into this group.
Added a new warning in this group for the case where the attribute is missing/implicit on
an override of a virtual method.
- Remove ``-Wperf-constraint-implies-noexcept`` from ``-Wall``. This warning is somewhat nit-picky and
attempts to resolve it, by adding ``noexcept``, can create new ways for programs to crash. (#GH167540)
- Implemented diagnostics when retrieving the tuple size for types where its specialization of `std::tuple_size`
produces an invalid size (either negative or greater than the implementation limit). (#GH159563)
- Fixed fix-it hint for fold expressions. Clang now correctly places the suggested right
Expand Down
2 changes: 1 addition & 1 deletion clang/include/clang/Basic/DiagnosticGroups.td
Original file line number Diff line number Diff line change
Expand Up @@ -1312,7 +1312,7 @@ def Consumed : DiagGroup<"consumed">;
// DefaultIgnore in addition to putting it here.
def All : DiagGroup<"all", [Most, Parentheses, Switch, SwitchBool,
MisleadingIndentation, PackedNonPod,
VLACxxExtension, PerfConstraintImpliesNoexcept]>;
VLACxxExtension]>;

// Warnings that should be in clang-cl /w4.
def : DiagGroup<"CL4", [All, Extra]>;
Expand Down
79 changes: 79 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenExpr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -631,10 +631,49 @@ RValue CIRGenFunction::emitLoadOfLValue(LValue lv, SourceLocation loc) {
lv.getVectorIdx()));
}

if (lv.isExtVectorElt())
return emitLoadOfExtVectorElementLValue(lv);

cgm.errorNYI(loc, "emitLoadOfLValue");
return RValue::get(nullptr);
}

int64_t CIRGenFunction::getAccessedFieldNo(unsigned int idx,
const mlir::ArrayAttr elts) {
auto elt = mlir::cast<mlir::IntegerAttr>(elts[idx]);
return elt.getInt();
}

// If this is a reference to a subset of the elements of a vector, create an
// appropriate shufflevector.
RValue CIRGenFunction::emitLoadOfExtVectorElementLValue(LValue lv) {
mlir::Location loc = lv.getExtVectorPointer().getLoc();
mlir::Value vec = builder.createLoad(loc, lv.getExtVectorAddress());

// HLSL allows treating scalars as one-element vectors. Converting the scalar
// IR value to a vector here allows the rest of codegen to behave as normal.
if (getLangOpts().HLSL && !mlir::isa<cir::VectorType>(vec.getType())) {
cgm.errorNYI(loc, "emitLoadOfExtVectorElementLValue: HLSL");
return {};
}

const mlir::ArrayAttr elts = lv.getExtVectorElts();

// If the result of the expression is a non-vector type, we must be extracting
// a single element. Just codegen as an extractelement.
const auto *exprVecTy = lv.getType()->getAs<clang::VectorType>();
if (!exprVecTy) {
int64_t indexValue = getAccessedFieldNo(0, elts);
cir::ConstantOp index =
builder.getConstInt(loc, builder.getSInt64Ty(), indexValue);
return RValue::get(cir::VecExtractOp::create(builder, loc, vec, index));
}

cgm.errorNYI(
loc, "emitLoadOfExtVectorElementLValue: Result of expr is vector type");
return {};
}

static cir::FuncOp emitFunctionDeclPointer(CIRGenModule &cgm, GlobalDecl gd) {
assert(!cir::MissingFeatures::weakRefReference());
return cgm.getAddrOfFunction(gd);
Expand Down Expand Up @@ -1120,6 +1159,46 @@ CIRGenFunction::emitArraySubscriptExpr(const clang::ArraySubscriptExpr *e) {
return lv;
}

LValue CIRGenFunction::emitExtVectorElementExpr(const ExtVectorElementExpr *e) {
// Emit the base vector as an l-value.
LValue base;

// ExtVectorElementExpr's base can either be a vector or pointer to vector.
if (e->isArrow()) {
cgm.errorNYI(e->getSourceRange(),
"emitExtVectorElementExpr: pointer to vector");
return {};
} else if (e->getBase()->isGLValue()) {
// Otherwise, if the base is an lvalue ( as in the case of foo.x.x),
// emit the base as an lvalue.
assert(e->getBase()->getType()->isVectorType());
base = emitLValue(e->getBase());
} else {
// Otherwise, the base is a normal rvalue (as in (V+V).x), emit it as such.
cgm.errorNYI(e->getSourceRange(),
"emitExtVectorElementExpr: base is a normal rvalue");
return {};
}

QualType type =
e->getType().withCVRQualifiers(base.getQuals().getCVRQualifiers());

// Encode the element access list into a vector of unsigned indices.
SmallVector<uint32_t, 4> indices;
e->getEncodedElementAccess(indices);

if (base.isSimple()) {
SmallVector<int64_t> attrElts(indices.begin(), indices.end());
mlir::ArrayAttr elts = builder.getI64ArrayAttr(attrElts);
return LValue::makeExtVectorElt(base.getAddress(), elts, type,
base.getBaseInfo());
}

cgm.errorNYI(e->getSourceRange(),
"emitExtVectorElementExpr: isSimple is false");
return {};
}

LValue CIRGenFunction::emitStringLiteralLValue(const StringLiteral *e,
llvm::StringRef name) {
cir::GlobalOp globalOp = cgm.getGlobalForStringLiteral(e, name);
Expand Down
3 changes: 3 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -839,6 +839,9 @@ void AggExprEmitter::visitCXXParenListOrInitListExpr(
}
}

// Prepare a 'this' for CXXDefaultInitExprs.
CIRGenFunction::FieldConstructionScope fcScope(cgf, dest.getAddress());

LValue destLV = cgf.makeAddrLValue(dest.getAddress(), e->getType());

if (record->isUnion()) {
Expand Down
6 changes: 6 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -199,6 +199,10 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> {
return emitNullValue(e->getType(), cgf.getLoc(e->getSourceRange()));
}

mlir::Value VisitGNUNullExpr(const GNUNullExpr *e) {
return emitNullValue(e->getType(), cgf.getLoc(e->getSourceRange()));
}

mlir::Value VisitOpaqueValueExpr(OpaqueValueExpr *e) {
if (e->isGLValue())
return emitLoadOfLValue(cgf.getOrCreateOpaqueLValueMapping(e),
Expand Down Expand Up @@ -279,6 +283,8 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> {
e->getSourceRange().getBegin());
}

mlir::Value VisitExtVectorElementExpr(Expr *e) { return emitLoadOfLValue(e); }

mlir::Value VisitMemberExpr(MemberExpr *e);

mlir::Value VisitCompoundLiteralExpr(CompoundLiteralExpr *e) {
Expand Down
2 changes: 2 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenFunction.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -887,6 +887,8 @@ LValue CIRGenFunction::emitLValue(const Expr *e) {
return emitConditionalOperatorLValue(cast<BinaryConditionalOperator>(e));
case Expr::ArraySubscriptExprClass:
return emitArraySubscriptExpr(cast<ArraySubscriptExpr>(e));
case Expr::ExtVectorElementExprClass:
return emitExtVectorElementExpr(cast<ExtVectorElementExpr>(e));
case Expr::UnaryOperatorClass:
return emitUnaryOpLValue(cast<UnaryOperator>(e));
case Expr::StringLiteralClass:
Expand Down
6 changes: 6 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenFunction.h
Original file line number Diff line number Diff line change
Expand Up @@ -1277,6 +1277,8 @@ class CIRGenFunction : public CIRGenTypeCache {
QualType &baseType, Address &addr);
LValue emitArraySubscriptExpr(const clang::ArraySubscriptExpr *e);

LValue emitExtVectorElementExpr(const ExtVectorElementExpr *e);

Address emitArrayToPointerDecay(const Expr *e,
LValueBaseInfo *baseInfo = nullptr);

Expand Down Expand Up @@ -1342,6 +1344,8 @@ class CIRGenFunction : public CIRGenTypeCache {
mlir::Value emittedE,
bool isDynamic);

int64_t getAccessedFieldNo(unsigned idx, mlir::ArrayAttr elts);

RValue emitCall(const CIRGenFunctionInfo &funcInfo,
const CIRGenCallee &callee, ReturnValueSlot returnValue,
const CallArgList &args, cir::CIRCallOpInterface *callOp,
Expand Down Expand Up @@ -1637,6 +1641,8 @@ class CIRGenFunction : public CIRGenTypeCache {
/// Load a complex number from the specified l-value.
mlir::Value emitLoadOfComplex(LValue src, SourceLocation loc);

RValue emitLoadOfExtVectorElementLValue(LValue lv);

/// Given an expression that represents a value lvalue, this method emits
/// the address of the lvalue, then loads the result as an rvalue,
/// returning the rvalue.
Expand Down
33 changes: 32 additions & 1 deletion clang/lib/CIR/CodeGen/CIRGenValue.h
Original file line number Diff line number Diff line change
Expand Up @@ -166,7 +166,8 @@ class LValue {
// this is the alignment of the whole vector)
unsigned alignment;
mlir::Value v;
mlir::Value vectorIdx; // Index for vector subscript
mlir::Value vectorIdx; // Index for vector subscript
mlir::Attribute vectorElts; // ExtVector element subset: V.xyx
mlir::Type elementType;
LValueBaseInfo baseInfo;
const CIRGenBitFieldInfo *bitFieldInfo{nullptr};
Expand All @@ -190,6 +191,7 @@ class LValue {
bool isSimple() const { return lvType == Simple; }
bool isVectorElt() const { return lvType == VectorElt; }
bool isBitField() const { return lvType == BitField; }
bool isExtVectorElt() const { return lvType == ExtVectorElt; }
bool isGlobalReg() const { return lvType == GlobalReg; }
bool isVolatile() const { return quals.hasVolatile(); }

Expand Down Expand Up @@ -254,6 +256,22 @@ class LValue {
return vectorIdx;
}

// extended vector elements.
Address getExtVectorAddress() const {
assert(isExtVectorElt());
return Address(getExtVectorPointer(), elementType, getAlignment());
}

mlir::Value getExtVectorPointer() const {
assert(isExtVectorElt());
return v;
}

mlir::ArrayAttr getExtVectorElts() const {
assert(isExtVectorElt());
return mlir::cast<mlir::ArrayAttr>(vectorElts);
}

static LValue makeVectorElt(Address vecAddress, mlir::Value index,
clang::QualType t, LValueBaseInfo baseInfo) {
LValue r;
Expand All @@ -265,6 +283,19 @@ class LValue {
return r;
}

static LValue makeExtVectorElt(Address vecAddress, mlir::ArrayAttr elts,
clang::QualType type,
LValueBaseInfo baseInfo) {
LValue r;
r.lvType = ExtVectorElt;
r.v = vecAddress.getPointer();
r.elementType = vecAddress.getElementType();
r.vectorElts = elts;
r.initialize(type, type.getQualifiers(), vecAddress.getAlignment(),
baseInfo);
return r;
}

// bitfield lvalue
Address getBitFieldAddress() const {
return Address(getBitFieldPointer(), elementType, getAlignment());
Expand Down
28 changes: 28 additions & 0 deletions clang/test/CIR/CodeGen/gnu-null.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-cir %s -o %t.cir
// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll
// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM
// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll
// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG

void gnu_null_expr() {
long a = __null;
int *b = __null;
}

// CIR: %[[A_ADDR:.*]] = cir.alloca !s64i, !cir.ptr<!s64i>, ["a", init]
// CIR: %[[B_ADDR:.*]] = cir.alloca !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>>, ["b", init]
// CIR: %[[CONST_0:.*]] = cir.const #cir.int<0> : !s64i
// CIR: cir.store {{.*}} %[[CONST_0]], %[[A_ADDR]] : !s64i, !cir.ptr<!s64i>
// CIR: %[[CONST_NULL:.*]] = cir.const #cir.ptr<null> : !cir.ptr<!s32i>
// CIR: cir.store {{.*}} %[[CONST_NULL]], %[[B_ADDR]] : !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>>

// LLVM: %[[A_ADDR:.*]] = alloca i64, i64 1, align 8
// LLVM: %[[B_ADDR:.*]] = alloca ptr, i64 1, align 8
// LLVM: store i64 0, ptr %[[A_ADDR]], align 8
// LLVM: store ptr null, ptr %[[B_ADDR]], align 8

// OGCG: %[[A_ADDR:.*]] = alloca i64, align 8
// OGCG: %[[B_ADDR:.*]] = alloca ptr, align 8
// OGCG: store i64 0, ptr %[[A_ADDR]], align 8
// OGCG: store ptr null, ptr %[[B_ADDR]], align 8
23 changes: 23 additions & 0 deletions clang/test/CIR/CodeGen/struct-init.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -205,3 +205,26 @@ void init_expr(int a, int b, int c) {
// OGCG: %[[C_PLUS_THREE:.*]] = add nsw i32 %[[C]], 3
// OGCG: store i32 %[[C_PLUS_THREE]], ptr %[[S_C]]
// OGCG: ret void

void cxx_default_init_with_struct_field() {
struct Parent {
int getA();
int a = getA();
};
Parent p = Parent{};
}

// CIR: %[[P_ADDR:.*]] = cir.alloca !rec_Parent, !cir.ptr<!rec_Parent>, ["p", init]
// CIR: %[[P_ELEM_0_PTR:.*]] = cir.get_member %[[P_ADDR]][0] {name = "a"} : !cir.ptr<!rec_Parent> -> !cir.ptr<!s32i>
// CIR: %[[METHOD_CALL:.*]] = cir.call @_ZZ34cxx_default_init_with_struct_fieldvEN6Parent4getAEv(%[[P_ADDR]]) : (!cir.ptr<!rec_Parent>) -> !s32i
// CIR: cir.store{{.*}} %[[METHOD_CALL]], %[[P_ELEM_0_PTR]] : !s32i, !cir.ptr<!s32i>

// LLVM: %[[P_ADDR:.*]] = alloca %struct.Parent, i64 1, align 4
// LLVM: %[[P_ELEM_0_PTR:.*]] = getelementptr %struct.Parent, ptr %[[P_ADDR]], i32 0, i32 0
// LLVM: %[[METHOD_CALL:.*]] = call i32 @_ZZ34cxx_default_init_with_struct_fieldvEN6Parent4getAEv(ptr %[[P_ADDR]])
// LLVM: store i32 %[[METHOD_CALL]], ptr %[[P_ELEM_0_PTR]], align 4

// OGCG: %[[P_ADDR:.*]] = alloca %struct.Parent, align 4
// OGCG: %[[P_ELEM_0_PTR:.*]] = getelementptr inbounds nuw %struct.Parent, ptr %[[P_ADDR]], i32 0, i32 0
// OGCG: %[[METHOD_CALL:.*]] = call noundef i32 @_ZZ34cxx_default_init_with_struct_fieldvEN6Parent4getAEv(ptr {{.*}} %[[P_ADDR]])
// OGCG: store i32 %[[METHOD_CALL]], ptr %[[P_ELEM_0_PTR]], align 4
46 changes: 46 additions & 0 deletions clang/test/CIR/CodeGen/vector-ext-element.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,46 @@
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-cir %s -o %t.cir
// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll
// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll
// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG

typedef int vi4 __attribute__((ext_vector_type(4)));

void element_expr_from_gl() {
vi4 a;
int x = a.x;
int y = a.y;
}

// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["a"]
// CIR: %[[X_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["x", init]
// CIR: %[[Y_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["y", init]
// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<4 x !s32i>>, !cir.vector<4 x !s32i>
// CIR: %[[CONST_0:.*]] = cir.const #cir.int<0> : !s64i
// CIR: %[[ELEM_0:.*]] = cir.vec.extract %[[TMP_A]][%[[CONST_0]] : !s64i] : !cir.vector<4 x !s32i>
// CIR: cir.store {{.*}} %[[ELEM_0]], %[[X_ADDR]] : !s32i, !cir.ptr<!s32i>
// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<4 x !s32i>>, !cir.vector<4 x !s32i>
// CIR: %[[CONST_1:.*]] = cir.const #cir.int<1> : !s64i
// CIR: %[[ELEM_1:.*]] = cir.vec.extract %[[TMP_A]][%[[CONST_1]] : !s64i] : !cir.vector<4 x !s32i>
// CIR: cir.store {{.*}} %[[ELEM_1]], %[[Y_ADDR]] : !s32i, !cir.ptr<!s32i>

// LLVM: %[[A_ADDR:.*]] = alloca <4 x i32>, i64 1, align 16
// LLVM: %[[X_ADDR:.*]] = alloca i32, i64 1, align 4
// LLVM: %[[Y_ADDR:.*]] = alloca i32, i64 1, align 4
// LLVM: %[[TMP_A:.*]] = load <4 x i32>, ptr %[[A_ADDR]], align 16
// LLVM: %[[ELEM_0:.*]] = extractelement <4 x i32> %4, i64 0
// LLVM: store i32 %[[ELEM_0]], ptr %[[X_ADDR]], align 4
// LLVM: %[[TMP_A:.*]] = load <4 x i32>, ptr %[[A_ADDR]], align 16
// LLVM: %[[ELEM_1:.*]] = extractelement <4 x i32> %6, i64 1
// LLVM: store i32 %[[ELEM_1]], ptr %[[Y_ADDR]], align 4

// OGCG: %[[A_ADDR:.*]] = alloca <4 x i32>, align 16
// OGCG: %[[X_ADDR:.*]] = alloca i32, align 4
// OGCG: %[[Y_ADDR:.*]] = alloca i32, align 4
// OGCG: %[[TMP_A:.*]] = load <4 x i32>, ptr %[[A_ADDR]], align 16
// OGCG: %[[ELEM_0:.*]] = extractelement <4 x i32> %[[TMP_A]], i64 0
// OGCG: store i32 %[[ELEM_0]], ptr %[[X_ADDR]], align 4
// OGCG: %[[TMP_A:.*]] = load <4 x i32>, ptr %[[A_ADDR]], align 16
// OGCG: %[[ELEM_1:.*]] = extractelement <4 x i32> %[[TMP_A]], i64 1
// OGCG: store i32 %[[ELEM_1]], ptr %[[Y_ADDR]], align 4
1 change: 0 additions & 1 deletion clang/test/Misc/warning-wall.c
Original file line number Diff line number Diff line change
Expand Up @@ -108,6 +108,5 @@ CHECK-NEXT: -Wmisleading-indentation
CHECK-NEXT: -Wpacked-non-pod
CHECK-NEXT: -Wvla-cxx-extension
CHECK-NEXT: -Wvla-extension-static-assert
CHECK-NEXT: -Wperf-constraint-implies-noexcept

CHECK-NOT:-W
7 changes: 0 additions & 7 deletions flang/include/flang/Lower/OpenMP.h
Original file line number Diff line number Diff line change
Expand Up @@ -97,13 +97,6 @@ bool markOpenMPDeferredDeclareTargetFunctions(
AbstractConverter &);
void genOpenMPRequires(mlir::Operation *, const Fortran::semantics::Symbol *);

// Materialize omp.declare_mapper ops for mapper declarations found in
// imported modules. If \p scope is null, materialize for the whole
// semantics global scope; otherwise, operate recursively starting at \p scope.
void materializeOpenMPDeclareMappers(
Fortran::lower::AbstractConverter &, Fortran::semantics::SemanticsContext &,
const Fortran::semantics::Scope *scope = nullptr);

} // namespace lower
} // namespace Fortran

Expand Down
20 changes: 1 addition & 19 deletions flang/include/flang/Semantics/symbol.h
Original file line number Diff line number Diff line change
Expand Up @@ -777,32 +777,14 @@ class UserReductionDetails {
DeclVector declList_;
};

// Used for OpenMP DECLARE MAPPER, it holds the declaration constructs
// so they can be serialized into module files and later re-parsed when
// USE-associated.
class MapperDetails {
public:
using DeclVector = std::vector<const parser::OpenMPDeclarativeConstruct *>;

MapperDetails() = default;

void AddDecl(const parser::OpenMPDeclarativeConstruct *decl) {
declList_.emplace_back(decl);
}
const DeclVector &GetDeclList() const { return declList_; }

private:
DeclVector declList_;
};

class UnknownDetails {};

using Details = std::variant<UnknownDetails, MainProgramDetails, ModuleDetails,
SubprogramDetails, SubprogramNameDetails, EntityDetails,
ObjectEntityDetails, ProcEntityDetails, AssocEntityDetails,
DerivedTypeDetails, UseDetails, UseErrorDetails, HostAssocDetails,
GenericDetails, ProcBindingDetails, NamelistDetails, CommonBlockDetails,
TypeParamDetails, MiscDetails, UserReductionDetails, MapperDetails>;
TypeParamDetails, MiscDetails, UserReductionDetails>;
llvm::raw_ostream &operator<<(llvm::raw_ostream &, const Details &);
std::string DetailsToString(const Details &);

Expand Down
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