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AArch64: fixup HW atomic_t ops type from dword to qword #7861

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Merged
merged 2 commits into from
Jul 25, 2023
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AArch64: fixup HW atomic_t ops type from dword to qword #7861

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4ff7efa
HAL:AArch64: fixup HW atomic_t ops type from dword to qword
GuEe-GUI Jul 24, 2023
284e3ab
Merge branch 'master' of https://github.com/RT-Thread/rt-thread into …
GuEe-GUI Jul 25, 2023
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26 changes: 13 additions & 13 deletions libcpu/aarch64/common/atomic_aarch64.c
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Original file line number Diff line number Diff line change
Expand Up @@ -8,14 +8,15 @@
* 2023-05-18 GuEe-GUI first version
*/

#include <rthw.h>
#include <rtatomic.h>

rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr)
{
rt_atomic_t ret;

__asm__ volatile (
" ldr %w0, %1\n"
" ldr %0, %1\n"
" dmb ish"
: "=r" (ret)
: "Q" (*ptr)
Expand All @@ -27,7 +28,7 @@ rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr)
void rt_hw_atomic_store(volatile rt_atomic_t *ptr, rt_atomic_t val)
{
__asm__ volatile (
" stlr %w1, %0\n"
" str %1, %0\n"
" dmb ish"
: "=Q" (*ptr)
: "r" (val)
Expand All @@ -41,9 +42,9 @@ rt_atomic_t rt_hw_atomic_##op(volatile rt_atomic_t *ptr, rt_atomic_t in_val)
\
__asm__ volatile ( \
" prfm pstl1strm, %3\n" \
"1: ldxr %w0, %3\n" \
" "#ins " %w1, %w0, %w4\n" \
" stlxr %w2, %w1, %3\n" \
"1: ldxr %0, %3\n" \
" "#ins " %1, %0, %4\n" \
" stlxr %w2, %1, %3\n" \
" cbnz %w2, 1b\n" \
" dmb ish" \
: "=&r" (result), "=&r" (val), "=&r" (tmp), "+Q" (*ptr) \
Expand All @@ -65,8 +66,8 @@ rt_atomic_t rt_hw_atomic_exchange(volatile rt_atomic_t *ptr, rt_atomic_t val)

__asm__ volatile (
" prfm pstl1strm, %2\n"
"1: ldxr %w0, %2\n"
" stlxr %w1, %w3, %2\n"
"1: ldxr %0, %2\n"
" stlxr %w1, %3, %2\n"
" cbnz %w1, 1b\n"
" dmb ish"
: "=&r" (ret), "=&r" (tmp), "+Q" (*ptr)
Expand All @@ -92,17 +93,16 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a

__asm__ volatile (
" prfm pstl1strm, %2\n"
"1: ldxr %w0, %2\n"
" eor %w1, %w0, %w3\n"
" cbnz %w1, 2f\n"
" stlxr %w1, %w4, %2\n"
"1: ldxr %0, %2\n"
" eor %1, %0, %3\n"
" cbnz %1, 2f\n"
" stlxr %w1, %4, %2\n"
" cbnz %w1, 1b\n"
" dmb ish\n"
"2:"
: "=&r" (oldval), "=&r" (tmp), "+Q" (*ptr)
: "Kr" (*old), "r" (new)
: "memory");

return oldval;
return oldval == *old;
}