GitHub - EDA-TOOL/ECE6332_VLSI_Design_ViPro: ECE6332 VLSI course work

Branches Tags

Name		Name	Last commit message	Last commit date
Latest commit History 57 Commits
.gitignore		.gitignore
Makefile		Makefile
README		README
RegFile.cpp		RegFile.cpp
RegFile.h		RegFile.h
calculator.cpp		calculator.cpp
calculator.h		calculator.h
mainRegFile.cpp		mainRegFile.cpp
metalCap.cpp		metalCap.cpp
metalCap.h		metalCap.h
parser.cpp		parser.cpp
parser.h		parser.h
periphery.cpp		periphery.cpp
periphery.h		periphery.h
userInput.cpp		userInput.cpp
userInput.h		userInput.h

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ViPro-RF v0.1

==========================

Development Route Guidance

1. Do not use default knob value constructed by constructor, instead use the value from template.

(done) 2. Manipulate simulation test case from user.m (SA, BC, etc.)

(done) 3. Support SWEEP