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Rename relaxed_fma to relaxed_madd (fnma to nmadd)
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8 files changed

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-46
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‎interpreter/binary/encode.ml‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -647,10 +647,10 @@ struct
647647
| VecBinary (V128 _) ->
648648
error e.at "illegal binary vector instruction"
649649

650-
| VecTernary (V128 (F32x4 V128Op.RelaxedFma)) -> vecop 0x105l
651-
| VecTernary (V128 (F32x4 V128Op.RelaxedFnma)) -> vecop 0x106l
652-
| VecTernary (V128 (F64x2 V128Op.RelaxedFma)) -> vecop 0x107l
653-
| VecTernary (V128 (F64x2 V128Op.RelaxedFnma)) -> vecop 0x108l
650+
| VecTernary (V128 (F32x4 V128Op.RelaxedMadd)) -> vecop 0x105l
651+
| VecTernary (V128 (F32x4 V128Op.RelaxedNmadd)) -> vecop 0x106l
652+
| VecTernary (V128 (F64x2 V128Op.RelaxedMadd)) -> vecop 0x107l
653+
| VecTernary (V128 (F64x2 V128Op.RelaxedNmadd)) -> vecop 0x108l
654654
| VecTernary (V128 (I8x16 V128Op.RelaxedLaneselect)) -> vecop 0x109l
655655
| VecTernary (V128 (I16x8 V128Op.RelaxedLaneselect)) -> vecop 0x10al
656656
| VecTernary (V128 (I32x4 V128Op.RelaxedLaneselect)) -> vecop 0x10bl

‎interpreter/syntax/ast.ml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ struct
6565
type fbinop = Add | Sub | Mul | Div | Min | Max | Pmin | Pmax
6666
| RelaxedMin | RelaxedMax
6767
type iternop = RelaxedLaneselect | RelaxedDotAccum
68-
type fternop = RelaxedFma | RelaxedFnma | RelaxedDotAccum
68+
type fternop = RelaxedMadd | RelaxedNmadd | RelaxedDotAccum
6969
type irelop = Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU
7070
type frelop = Eq | Ne | Lt | Le | Gt | Ge
7171
type icvtop = ExtendLowS | ExtendLowU | ExtendHighS | ExtendHighU

‎interpreter/syntax/operators.ml‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -511,12 +511,12 @@ let i32x4_relaxed_trunc_f64x2_s_zero = VecConvert (V128 (I32x4 V128Op.RelaxedTru
511511
let i32x4_relaxed_trunc_f64x2_u_zero = VecConvert (V128 (I32x4 V128Op.RelaxedTruncUZeroF64x2))
512512
let i32x4_relaxed_laneselect = VecTernary (V128 (I32x4 V128Op.RelaxedLaneselect))
513513
let i64x2_relaxed_laneselect = VecTernary (V128 (I64x2 V128Op.RelaxedLaneselect))
514-
let f32x4_relaxed_fma = VecTernary (V128 (F32x4 V128Op.RelaxedFma))
515-
let f32x4_relaxed_fnma = VecTernary (V128 (F32x4 V128Op.RelaxedFnma))
514+
let f32x4_relaxed_madd = VecTernary (V128 (F32x4 V128Op.RelaxedMadd))
515+
let f32x4_relaxed_nmadd = VecTernary (V128 (F32x4 V128Op.RelaxedNmadd))
516516
let f32x4_relaxed_min = VecBinary (V128 (F32x4 V128Op.RelaxedMin))
517517
let f32x4_relaxed_max = VecBinary (V128 (F32x4 V128Op.RelaxedMax))
518-
let f64x2_relaxed_fma = VecTernary (V128 (F64x2 V128Op.RelaxedFma))
519-
let f64x2_relaxed_fnma = VecTernary (V128 (F64x2 V128Op.RelaxedFnma))
518+
let f64x2_relaxed_madd = VecTernary (V128 (F64x2 V128Op.RelaxedMadd))
519+
let f64x2_relaxed_nmadd = VecTernary (V128 (F64x2 V128Op.RelaxedNmadd))
520520
let f64x2_relaxed_min = VecBinary (V128 (F64x2 V128Op.RelaxedMin))
521521
let f64x2_relaxed_max = VecBinary (V128 (F64x2 V128Op.RelaxedMax))
522522
let i16x8_dot_i8x16_i7x16_s = VecBinary (V128 (I16x8 V128Op.RelaxedDot))

‎interpreter/text/arrange.ml‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -280,8 +280,8 @@ struct
280280
| RelaxedMax -> "relaxed_max"
281281

282282
let fternop xxxx (op : fternop) = match op with
283-
| RelaxedFma -> "relaxed_fma"
284-
| RelaxedFnma-> "relaxed_fnma"
283+
| RelaxedMadd -> "relaxed_madd"
284+
| RelaxedNmadd-> "relaxed_nmadd"
285285
| RelaxedDotAccum -> "relaxed_dot_bf" ^ half (half xxxx) ^ "_add_" ^ xxxx
286286

287287
let irelop xxxx (op : irelop) = match op with

‎interpreter/text/lexer.mll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -658,10 +658,10 @@ rule token = parse
658658
| "i32x4.relaxed_trunc_f32x4_s" -> VEC_UNARY i32x4_relaxed_trunc_f32x4_s
659659
| "i32x4.relaxed_trunc_f64x2_u_zero" -> VEC_UNARY i32x4_relaxed_trunc_f64x2_u_zero
660660
| "i32x4.relaxed_trunc_f64x2_s_zero" -> VEC_UNARY i32x4_relaxed_trunc_f64x2_s_zero
661-
| "f32x4.relaxed_fma" -> VEC_UNARY f32x4_relaxed_fma
662-
| "f64x2.relaxed_fma" -> VEC_UNARY f64x2_relaxed_fma
663-
| "f32x4.relaxed_fnma" -> VEC_UNARY f32x4_relaxed_fnma
664-
| "f64x2.relaxed_fnma" -> VEC_UNARY f64x2_relaxed_fnma
661+
| "f32x4.relaxed_madd" -> VEC_UNARY f32x4_relaxed_madd
662+
| "f64x2.relaxed_madd" -> VEC_UNARY f64x2_relaxed_madd
663+
| "f32x4.relaxed_nmadd" -> VEC_UNARY f32x4_relaxed_nmadd
664+
| "f64x2.relaxed_nmadd" -> VEC_UNARY f64x2_relaxed_nmadd
665665
| "i8x16.relaxed_laneselect" -> VEC_TERNARY i8x16_relaxed_laneselect
666666
| "i16x8.relaxed_laneselect" -> VEC_TERNARY i16x8_relaxed_laneselect
667667
| "i32x4.relaxed_laneselect" -> VEC_TERNARY i32x4_relaxed_laneselect

‎proposals/relaxed-simd/ImplementationStatus.md‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -7,10 +7,10 @@
77
| `i32x4.relaxed_trunc_f32x4_u` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
88
| `i32x4.relaxed_trunc_f64x2_s_zero` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
99
| `i32x4.relaxed_trunc_f64x2_u_zero` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
10-
| `f32x4.relaxed_fma` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
11-
| `f32x4.relaxed_fnma` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
12-
| `f64x2.relaxed_fma` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
13-
| `f64x2.relaxed_fnma` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
10+
| `f32x4.relaxed_madd` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
11+
| `f32x4.relaxed_nmadd` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
12+
| `f64x2.relaxed_madd` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
13+
| `f64x2.relaxed_nmadd` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
1414
| `i8x16.relaxed_laneselect` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
1515
| `i16x8.relaxed_laneselect` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
1616
| `i32x4.relaxed_laneselect` | -mrelaxed-simd | :heavy_check_mark: | :heavy_check_mark: |
@@ -40,10 +40,10 @@
4040
| `i32x4.relaxed_trunc_f32x4_u` | `__builtin_wasm_relaxed_trunc_u_i32x4_f32x4` |
4141
| `i32x4.relaxed_trunc_f64x2_s_zero` | `__builtin_wasm_relaxed_trunc_zero_s_i32x4_f64x2` |
4242
| `i32x4.relaxed_trunc_f64x2_u_zero` | `__builtin_wasm_relaxed_trunc_zero_u_i32x4_f64x2` |
43-
| `f32x4.relaxed_fma` | `__builtin_wasm_fma_f32x4` |
44-
| `f32x4.relaxed_fnma` | `__builtin_wasm_fnma_f32x4` |
45-
| `f64x2.relaxed_fma` | `__builtin_wasm_fma_f64x2` |
46-
| `f64x2.relaxed_fnma` | `__builtin_wasm_fnma_f64x2` |
43+
| `f32x4.relaxed_madd` | `__builtin_wasm_fma_f32x4` |
44+
| `f32x4.relaxed_nmadd` | `__builtin_wasm_fnma_f32x4` |
45+
| `f64x2.relaxed_madd` | `__builtin_wasm_fma_f64x2` |
46+
| `f64x2.relaxed_nmadd` | `__builtin_wasm_fnma_f64x2` |
4747
| `i8x16.relaxed_laneselect` | `__builtin_wasm_laneselect_i8x16` |
4848
| `i16x8.relaxed_laneselect` | `__builtin_wasm_laneselect_i16x8` |
4949
| `i32x4.relaxed_laneselect` | `__builtin_wasm_laneselect_i32x4` |

‎proposals/relaxed-simd/Overview.md‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -165,17 +165,17 @@ def relaxed_i32x4_trunc_f64x2_zero_u(a : f64x2) -> i32x4:
165165

166166
### Relaxed fused multiply-add and fused negative multiply-add
167167

168-
- `relaxed f32x4.fma`
169-
- `relaxed f32x4.fnma`
170-
- `relaxed f64x2.fma`
171-
- `relaxed f64x2.fnma`
168+
- `relaxed f32x4.madd`
169+
- `relaxed f32x4.nmadd`
170+
- `relaxed f64x2.madd`
171+
- `relaxed f64x2.nmadd`
172172

173173
All the instructions take 3 operands, `a`, `b`, `c`, perform `a * b + c` or `-(a * b) + c`:
174174

175-
- `relaxed f32x4.fma(a, b, c) = a * b + c`
176-
- `relaxed f32x4.fnma(a, b, c) = -(a * b) + c`
177-
- `relaxed f64x2.fma(a, b, c) = a * b + c`
178-
- `relaxed f64x2.fnma(a, b, c) = -(a * b) + c`
175+
- `relaxed f32x4.madd(a, b, c) = a * b + c`
176+
- `relaxed f32x4.nmadd(a, b, c) = -(a * b) + c`
177+
- `relaxed f64x2.madd(a, b, c) = a * b + c`
178+
- `relaxed f64x2.nmadd(a, b, c) = -(a * b) + c`
179179

180180
where:
181181

@@ -323,10 +323,10 @@ forward, the opcodes for relaxed-simd specification will be the ones in the
323323
| `i32x4.relaxed_trunc_f32x4_u` | 0x102 | 0xa6 |
324324
| `i32x4.relaxed_trunc_f64x2_s_zero` | 0x103 | 0xc5 |
325325
| `i32x4.relaxed_trunc_f64x2_u_zero` | 0x104 | 0xc6 |
326-
| `f32x4.relaxed_fma` | 0x105 | 0xaf |
327-
| `f32x4.relaxed_fnma` | 0x106 | 0xb0 |
328-
| `f64x2.relaxed_fma` | 0x107 | 0xcf |
329-
| `f64x2.relaxed_fnma` | 0x108 | 0xd0 |
326+
| `f32x4.relaxed_madd` | 0x105 | 0xaf |
327+
| `f32x4.relaxed_nmadd` | 0x106 | 0xb0 |
328+
| `f64x2.relaxed_madd` | 0x107 | 0xcf |
329+
| `f64x2.relaxed_nmadd` | 0x108 | 0xd0 |
330330
| `i8x16.relaxed_laneselect` | 0x109 | 0xb2 |
331331
| `i16x8.relaxed_laneselect` | 0x10a | 0xb3 |
332332
| `i32x4.relaxed_laneselect` | 0x10b | 0xd2 |

‎test/core/relaxed-simd/relaxed_fma_fnma.wast‎ renamed to ‎test/core/relaxed-simd/relaxed_madd_nmadd.wast‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,10 @@
1-
;; Tests for f32x4.relaxed_fma, f32x4.relaxed_fnma, f64x2.relaxed_fma, and f64x2.relaxed_fnma.
1+
;; Tests for f32x4.relaxed_madd, f32x4.relaxed_nmadd, f64x2.relaxed_madd, and f64x2.relaxed_nmadd.
22

33
(module
4-
(func (export "f32x4.relaxed_fma") (param v128 v128 v128) (result v128) (f32x4.relaxed_fma (local.get 0) (local.get 1) (local.get 2)))
5-
(func (export "f32x4.relaxed_fnma") (param v128 v128 v128) (result v128) (f32x4.relaxed_fnma (local.get 0) (local.get 1) (local.get 2)))
6-
(func (export "f64x2.relaxed_fnma") (param v128 v128 v128) (result v128) (f64x2.relaxed_fnma (local.get 0) (local.get 1) (local.get 2)))
7-
(func (export "f64x2.relaxed_fma") (param v128 v128 v128) (result v128) (f64x2.relaxed_fma (local.get 0) (local.get 1) (local.get 2)))
4+
(func (export "f32x4.relaxed_madd") (param v128 v128 v128) (result v128) (f32x4.relaxed_madd (local.get 0) (local.get 1) (local.get 2)))
5+
(func (export "f32x4.relaxed_nmadd") (param v128 v128 v128) (result v128) (f32x4.relaxed_nmadd (local.get 0) (local.get 1) (local.get 2)))
6+
(func (export "f64x2.relaxed_nmadd") (param v128 v128 v128) (result v128) (f64x2.relaxed_nmadd (local.get 0) (local.get 1) (local.get 2)))
7+
(func (export "f64x2.relaxed_madd") (param v128 v128 v128) (result v128) (f64x2.relaxed_madd (local.get 0) (local.get 1) (local.get 2)))
88
)
99

1010

@@ -13,7 +13,7 @@
1313
;; FLT_MAX (if fma)
1414
;; 0 (if no fma)
1515
;; from https://www.vinc17.net/software/fma-tests.c
16-
(assert_return (invoke "f32x4.relaxed_fma"
16+
(assert_return (invoke "f32x4.relaxed_madd"
1717
(v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 )
1818
(v128.const f32x4 2.0 2.0 2.0 2.0)
1919
(v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))
@@ -29,13 +29,13 @@
2929
;; x.y+z = 0 (2 roundings)
3030
;; fma(x, y, z) = (0x1p-37) 2^-37
3131
;; from https://accurate-algorithms.readthedocs.io/en/latest/ch09appendix.html#test-system-information
32-
(assert_return (invoke "f32x4.relaxed_fma"
32+
(assert_return (invoke "f32x4.relaxed_madd"
3333
(v128.const f32x4 0x1.000004p+0 0x1.000004p+0 0x1.000004p+0 0x1.000004p+0)
3434
(v128.const f32x4 0x1.0002p+0 0x1.0002p+0 0x1.0002p+0 0x1.0002p+0)
3535
(v128.const f32x4 -0x1.000204p+0 -0x1.000204p+0 -0x1.000204p+0 -0x1.000204p+0))
3636
(either (v128.const f32x4 0x1p-37 0x1p-37 0x1p-37 0x1p-37)
3737
(v128.const f32x4 0 0 0 0)))
38-
(assert_return (invoke "f32x4.relaxed_fnma"
38+
(assert_return (invoke "f32x4.relaxed_nmadd"
3939
(v128.const f32x4 0x1.000004p+0 0x1.000004p+0 0x1.000004p+0 0x1.000004p+0)
4040
(v128.const f32x4 0x1.0002p+0 0x1.0002p+0 0x1.0002p+0 0x1.0002p+0)
4141
(v128.const f32x4 0x1.000204p+0 0x1.000204p+0 0x1.000204p+0 0x1.000204p+0))
@@ -48,7 +48,7 @@
4848
;; 0 (if no fma)
4949
;; form https://www.vinc17.net/software/fma-tests.c
5050
;; from https://www.vinc17.net/software/fma-tests.c
51-
(assert_return (invoke "f64x2.relaxed_fma"
51+
(assert_return (invoke "f64x2.relaxed_madd"
5252
(v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)
5353
(v128.const f64x2 2.0 2.0)
5454
(v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))
@@ -64,13 +64,13 @@
6464
;; x.y+z = 0 (2 roundings)
6565
;; fma(x, y, z) = 0x1p-53
6666
;; from https://accurate-algorithms.readthedocs.io/en/latest/ch09appendix.html#test-system-information
67-
(assert_return (invoke "f64x2.relaxed_fma"
67+
(assert_return (invoke "f64x2.relaxed_madd"
6868
(v128.const f64x2 0x1.00000004p+0 0x1.00000004p+0)
6969
(v128.const f64x2 0x1.000002p+0 0x1.000002p+0)
7070
(v128.const f64x2 -0x1.00000204p+0 -0x1.00000204p+0))
7171
(either (v128.const f64x2 0x1p-53 0x1p-53)
7272
(v128.const f64x2 0 0)))
73-
(assert_return (invoke "f64x2.relaxed_fnma"
73+
(assert_return (invoke "f64x2.relaxed_nmadd"
7474
(v128.const f64x2 0x1.00000004p+0 0x1.00000004p+0)
7575
(v128.const f64x2 0x1.000002p+0 0x1.000002p+0)
7676
(v128.const f64x2 0x1.00000204p+0 0x1.00000204p+0))

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