Skip to content
This repository was archived by the owner on Dec 22, 2021. It is now read-only.
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions proposals/simd/BinarySIMD.md
Original file line number Diff line number Diff line change
Expand Up @@ -189,3 +189,4 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
| `i32x4.load16x4_u` | `0xd5`| m:memarg |
| `i64x2.load32x2_s` | `0xd6`| m:memarg |
| `i64x2.load32x2_u` | `0xd7`| m:memarg |
| `v128.andnot` | `0xd8`| - |
1 change: 1 addition & 0 deletions proposals/simd/ImplementationStatus.md
Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,7 @@
| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `v128.andnot` | | | | |
| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
Expand Down
6 changes: 6 additions & 0 deletions proposals/simd/SIMD.md
Original file line number Diff line number Diff line change
Expand Up @@ -521,6 +521,12 @@ The logical operations defined on the scalar integer types are also available
on the `v128` type where they operate bitwise the same way C's `&`, `|`, `^`,
and `~` operators work on an `unsigned` type.

### Bitwise AND-NOT

* `v128.andnot(a: v128, b: v128) -> v128`

Bitwise AND of bits of `a` and the logical inverse of bits of `b`. This operation is equivalent to `v128.and(a, v128.not(b))`.

### Bitwise select
* `v128.bitselect(v1: v128, v2: v128, c: v128) -> v128`

Expand Down