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  • George Washington University
  • Arlington, VA
  • 11:04 (UTC -12:00)

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  1. IZ_Neuron_FPGA IZ_Neuron_FPGA Public

    FPGA implementation of Izhikevich Neuron Model.

    Verilog 3

  2. MIPS32_Pipeline_CPU_Chip_Design MIPS32_Pipeline_CPU_Chip_Design Public

    MIPS32 pipeline CPU chip design.

    Tcl

  3. Computer-Architecture-Design Computer-Architecture-Design Public

    Courseworks about mips assembly, and cache and memory simulation.

    Shell

  4. VLSI-Design-and-Simulation VLSI-Design-and-Simulation Public

    Courseworks of CMOS VLSI design using Cadence Virtuoso.

    Verilog

  5. ECE6025_ASIC_Design_and_Testing_of_VLSI_Circuits ECE6025_ASIC_Design_and_Testing_of_VLSI_Circuits Public

    PostScript

  6. ECE6213_Design_of_VLSI_Circuits ECE6213_Design_of_VLSI_Circuits Public

    Coursework of ECE6213 Design of VLSI Circuits at George Washington University.

    Verilog