v0.0.1

Synth compiles text-based circuit designs (SynthSpec) into KiCad schematics, PCB layouts, and bills of materials. This release ships prebuilt CLI binaries for five platforms, each with a SHA-256 checksum.

Install

Download the binary for your platform and verify it against the matching .sha256 file before running:

Platform	Asset
Linux x86-64	synth-linux-amd64
Linux arm64	synth-linux-arm64
macOS arm64	synth-darwin-arm64
macOS x86-64	synth-darwin-amd64
Windows x86-64	synth-windows-amd64.exe

# Linux
sha256sum -c synth-linux-amd64.sha256
# macOS
shasum -a 256 -c synth-darwin-arm64.sha256
# Windows (PowerShell)
certutil -hashfile synth-windows-amd64.exe SHA256

Then make it executable and confirm the build:

chmod +x synth-linux-amd64
./synth-linux-amd64 --version

From source

Requires a current stable Rust toolchain.

cargo install --git https://github.com/absmach/synth --tag v0.0.1 synth-cli

Quick start

synth validate fixtures/designs/hello.synth
synth export-kicad fixtures/designs/hello.synth --out output/hello

synth check DESIGN.synth --json is the deterministic, model-free gate for CI: it runs compiler validation and DRC and returns structured diagnostics with source locations. Add --fab to require a complete KiCad manufacturing export and receive SHA-256 hashes for the emitted files.

Agent integration

synth mcp --stdio

The MCP server exposes the SynthSpec language reference, registry search, validation, fixes, and every compiler stage with structured diagnostics, so agents can iterate on a design end to end.

Optional: KiCad integration

Electrical-rule checks, schematic rendering, and fabrication outputs shell out to kicad-cli. Install KiCad 10 to enable them. Without it, synth export-kicad still generates a project, but every native check reports unknown rather than passing, and any command that asked for verification (--validate-erc, --gerbers/--drill/--step, synth check --fab) fails closed. Set KICAD_CLI if the binary is not on PATH, and SYNTH_KICAD_CLI_TIMEOUT_SECS to change the per-run budget (default 300s).

Documentation

• Quick start
• KiCad workflows
• MCP server
• Component registry

The auto-generated list of changes and contributors follows below.

What's Changed

• NOISSUE - Add connector mating face metadata and implement orientation DRC rule E-SYNTH-DRC-011 by @SammyOina in #1
• NOISSUE - Improve placement sizing and routing feedback by @SammyOina in #2
• NOISSUE - Converge physical exports against native DRC by @SammyOina in #3
• Add company statement to KiCad title block and clean up tests by @rodneyosodo in #4
• Add degenerate divider-ratio check and diagnostics documentation by @rodneyosodo in #5
• Add netclass declarations and update board-literal call sites by @rodneyosodo in #6
• Add hierarchical sheet annotation and clean up test artifacts by @rodneyosodo in #10
• Add decoupling capacitance value check for diagnostics by @rodneyosodo in #9
• Add verified reference circuit catalog and support types by @rodneyosodo in #8
• Add warning for parts lacking MPN or LCSC identifiers by @rodneyosodo in #7
• NOISSUE - Improve placement margins and ground routing by @SammyOina in #11
• NOISSUE - Bound A* search, fix header orientation & clean up test corpus by @SammyOina in #12
• Optimize KiCad export: multithreaded repair search and faster A* routing by @rodneyosodo in #13
• NOISSUE - Reconstruct and route RP2350 development board by @SammyOina in #14
• NOISSUE - Add conservative KiCadRoutingTools policy gate by @SammyOina in #15
• NOISSUE - Add named nets, power rails, and netclass joins by @rodneyosodo in #16
• NOISSUE - Add DNP flag, schematic notes, group boxes, and multi-sheet support by @rodneyosodo in #17
• NOISSUE - Support explicit placement dimensions by @SammyOina in #18
• NOISSUE - Use declared rail voltages in pin fan-out and check unit tags by @rodneyosodo in #19
• NOISSUE - regions, net colours, and tighter page fitting by @rodneyosodo in #20
• NOISSUE - Expand USB-C pin mapping to fan out logical nets to all physical pads by @SammyOina in #21
• NOISSUE - Preserve multi-layer ground plane connectivity by @SammyOina in #24
• NOISSUE - Add CI/CD and Dependabot for Synth by @rodneyosodo in #22
• build(deps): bump dtolnay/rust-toolchain from 1.98.1 to 1.120.0 in the gh-dependency group by @dependabot[bot] in #25
• Revert "build(deps): bump dtolnay/rust-toolchain in the gh-dependency by @rodneyosodo in #26
• NOISSUE - Support 6-layer ground planes and add unit tests by @SammyOina in #23
• NOISSUE - Expose compiler capabilities and board families by @SammyOina in #28
• Fix schematic/PCB layout collision and repair broken footprint imports by @rodneyosodo in #29
• Let a design choose its schematic page size by @rodneyosodo in #30
• NOISSUE - Add deterministic release check gate by @SammyOina in #31
• NOISSUE - Remove private project reference from release gate by @SammyOina in #32
• refactor(layout): centralise pin classification and add placement cost by @rodneyosodo in #46
• SYN-42 - Fail closed when KiCad ERC/DRC evidence is unavailable by @JeffMboya in #47
• SYN-48 - Add DIFF-004 and DIFF-005 ERC rules by @nyagamunene in #49
• SYN-43 - Add pin-to-footprint registry integrity qualification by @JeffMboya in #50
• SYN-53 - Export reports KiCad DRC results honestly by @nyagamunene in #70
• SYN-44 - Make unsafe export overrides visibly non-production by @JeffMboya in #71
• SYN-54 - Split grounds keep their name and identity in the exported board by @nyagamunene in #72
• SYN-55 - Capability list states what is unsupported or unverified by @nyagamunene in #73
• SYN-56 - Regulator feedback safety: pin-role tags and a switch-node rule by @nyagamunene in #74
• SYN-57 - A design can declare its board stackup by @nyagamunene in #76
• SYN-62 - Controlled impedance needs a reference plane, or is labelled not verified by @nyagamunene in #79
• SYN-61 - Release mode fails when the exported board is incomplete by @nyagamunene in #80
• SYN-63 - Derive and check trace width for single-ended outer-layer controlled impedance by @nyagamunene in #81
• NOISSUE - pin-anchored placement, one-pass cluster recognition, and routing diagnostics by @rodneyosodo in #84
• Limit Docker core build context to release artifacts by @SammyOina in #88
• NOISSUE - Auto-tag and release from the Cargo.toml version by @rodneyosodo in #92

New Contributors

• @SammyOina made their first contribution in #1
• @rodneyosodo made their first contribution in #4
• @dependabot[bot] made their first contribution in #25
• @JeffMboya made their first contribution in #47
• @nyagamunene made their first contribution in #49

Full Changelog: https://github.com/absmach/synth/commits/v0.0.1