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@github-actions github-actions released this 06 Nov 14:24
· 53 commits to main since this release
v0.1.2
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Learn about vigilant mode.

Synth compiles text-based circuit designs (SynthSpec) into KiCad schematics, PCB layouts, and bills of materials. This release ships prebuilt CLI binaries for five platforms, each with a SHA-256 checksum.

Install

Download the binary for your platform and verify it against the matching .sha256 file before running:

Platform Asset
Linux x86-64 synth-linux-amd64
Linux arm64 synth-linux-arm64
macOS arm64 synth-darwin-arm64
macOS x86-64 synth-darwin-amd64
Windows x86-64 synth-windows-amd64.exe 
# Linux
sha256sum -c synth-linux-amd64.sha256
# macOS
shasum -a 256 -c synth-darwin-arm64.sha256
# Windows (PowerShell)
certutil -hashfile synth-windows-amd64.exe SHA256

Then make it executable and confirm the build:

chmod +x synth-linux-amd64
./synth-linux-amd64 --version

From source

Requires a current stable Rust toolchain.

cargo install --git https://github.com/absmach/synth --tag v0.1.2 synth-cli

Quick start

synth validate fixtures/designs/hello.synth
synth export-kicad fixtures/designs/hello.synth --out output/hello

synth check DESIGN.synth --json is the deterministic, model-free gate for CI: it runs compiler validation and DRC and returns structured diagnostics with source locations. Add --fab to require a complete KiCad manufacturing export and receive SHA-256 hashes for the emitted files.

Agent integration

synth mcp --stdio

The MCP server exposes the SynthSpec language reference, registry search, validation, fixes, and every compiler stage with structured diagnostics, so agents can iterate on a design end to end.

Optional: KiCad integration

Electrical-rule checks, schematic rendering, and fabrication outputs shell out to kicad-cli. Install KiCad 10 to enable them. Without it, synth export-kicad still generates a project, but every native check reports unknown rather than passing, and any command that asked for verification (--validate-erc, --gerbers/--drill/--step, synth check --fab) fails closed. Set KICAD_CLI if the binary is not on PATH, and SYNTH_KICAD_CLI_TIMEOUT_SECS to change the per-run budget (default 300s).

Documentation

The auto-generated list of changes and contributors follows below.

What's Changed

  • Chore: Release V0.1.1 by @rodneyosodo in #101
  • NOISSUE - Align RP2350 showcase registry pin mappings by @SammyOina in #100
  • NOISSUE - Recognize no-connect markers in schematic validation by @SammyOina in #106
  • NOISSUE - Fix LED anode and cathode pin numbers in the registry by @nyagamunene in #86
  • NOISSUE - Derive imported route uuids from their content by @nyagamunene in #89
  • NOISSUE - Add USB protection, crystal and LED parts and fix registry ratings by @nyagamunene in #90
  • NOISSUE - Size synthesized IC bodies the same in the schematic and the symbol library by @nyagamunene in #104
  • fix(cd): build Linux release binaries on an older-glibc runner by @rodneyosodo in #111
  • NOISSUE - Update reference golden fingerprints from CI by @nyagamunene in #116
  • NOISSUE - Place edge-hinted connectors flush with the board edge by @nyagamunene in #105
  • NOISSUE - Read rotated pad positions the way KiCad writes them by @nyagamunene in #109
  • NOISSUE - Join cut-off ground pour pieces after routing by @nyagamunene in #108
  • NOISSUE - Tighten passive spacing in the outline packer so boards come out compact by @nyagamunene in #113
  • fix: make Compose CLI builds runtime-compatible by @SammyOina in #112
  • NOISSUE - Deliver the routed board with its ground pours filled by @nyagamunene in #114
  • NOISSUE - Stackup-driven signal integrity, KiCadRoutingTools default, and place→route→re-place by @rodneyosodo in #120
  • NOISSUE - Placement seed and opt-in power planes by @rodneyosodo in #121
  • NOISSUE - Warn on a signal via with no ground return via by @rodneyosodo in #124
  • NOISSUE - Record approved via-in-pad sites as fabrication notes by @nyagamunene in #139
  • NOISSUE - Warn on unprotected and always-terminated RS-485 lines by @nyagamunene in #140
  • NOISSUE - Plane fanout stubs, plane-split detection, and loop/hygiene follow-ups by @rodneyosodo in #125
  • NOISSUE - Physics in the gate, split-ground priority, placement-loop payoff, agent parity by @rodneyosodo in #126
  • NOISSUE - Power integrity, split-ground regions, registry thermal data, MCP cleanup by @rodneyosodo in #127
  • NOISSUE - Keep reference labels on the board and clear of other parts by @nyagamunene in #144
  • NOISSUE - Close the SI/PI/placement caveats; SI/PI depth and thermal-aware placement by @rodneyosodo in #132
  • SYN-40 - Add the registry's first BGA part, and an HDMI receptacle by @JeffMboya in #156
  • NOISSUE - read a through via as the span of layers it crosses by @JeffMboya in #153
  • NOISSUE - Fix a protection device's surge rating is not steady current by @rodneyosodo in #163
  • SYN-128 - Give each plane rail an inner layer of its own by @JeffMboya in #160
  • NOISSUE - Let the board outline end at a mounting hole, test point or fiducial courtyard by @nyagamunene in #162
  • NOISSUE - Run the SI/PI rules on the routed board in the release gate by @rodneyosodo in #134
  • NOISSUE - Per-example directories and complete MCU pin maps by @rodneyosodo in #141
  • fix(kicad): refresh the sensor_logger golden SVG fingerprint by @rodneyosodo in #172
  • NOISSUE - Bump rustls to 0.23.46 for four RUSTSEC advisories by @nyagamunene in #174
  • NOISSUE - Put reference labels next to their part before falling back to the far default by @nyagamunene in #173
  • NOISSUE - Fix the CD Linux builds restoring a newer-glibc cache by @rodneyosodo in #179
  • NOISSUE - Carry the manufacturer clearances in the exported project file by @nyagamunene in #154
  • NOISSUE - Let designs and part files steer silkscreen reference labels by @nyagamunene in #149
  • NOISSUE - Auto-apply the placement review and shorten wires between connected parts by @nyagamunene in #180
  • NOISSUE - Compact the auto placement so boards are only as big as their parts need by @nyagamunene in #185
  • NOISSUE - Give every outer ground pad a via within 2 mm of its edge by @nyagamunene in #175
  • NOISSUE - Keep copper and vias out from under a mounting hole's screw head by @nyagamunene in #176
  • SYN-40 - Write every manufacturer minimum into the exported project by @JeffMboya in #167
  • NOISSUE - Check a via against the pad's real outline by @nyagamunene in #198
  • NOISSUE - Turn the pads of a rotated footprint with the footprint by @nyagamunene in #200
  • NOISSUE - Use a net's declared name as its schematic label by @nyagamunene in #197
  • NOISSUE - Report whether each part's footprint has a 3D model by @nyagamunene in #151
  • NOISSUE - Establish LCSC integration phase zero contract by @SammyOina in #213
  • NOISSUE - Make supplier identity and snapshots explicit by @SammyOina in #214
  • NOISSUE - Freeze real-part procurement assignments by @SammyOina in #215
  • SYN-40 - A regulator feedback divider is not a bus pull-up by @JeffMboya in #182
  • NOISSUE - Add reproducible manufacturing cost reports by @SammyOina in #217
  • SYN-187 - A clock arriving on a connector has a source by @JeffMboya in #188
  • SYN-189 - A decoupling capacitor is not a power source by @JeffMboya in #192
  • SYN-40 - Add an SDR SDRAM part, the registry's first parallel memory by @JeffMboya in #186
  • NOISSUE - Add strict JLCPCB manufacturing bundles by @SammyOina in #218
  • SYN-40 - Keep the project beside the board the engine reads by @JeffMboya in #168
  • SYN-203 - Run net label text away from its stub and route around it by @nyagamunene in #202
  • SYN-204 - Score an exported schematic by @nyagamunene in #208
  • SYN-205 - Tile the schematic page with regions sized from their content by @nyagamunene in #209
  • SYN-207 - Put pull resistors beside the pin they pull by @nyagamunene in #210
  • NOISSUE - Take zip 9, which the advisory database now requires by @JeffMboya in #224
  • NOISSUE - Correct why a non-UTF-8 zip entry name is skipped by @rodneyosodo in #244
  • SYN-203 - Keep Reference and Value text off wires, labels and other text by @nyagamunene in #211
  • SYN-206 - Draw net labels as boxed pointed flags by @nyagamunene in #219
  • SYN-212 - Keep everything inside its region box and give the title its own band by @nyagamunene in #225
  • SYN-203 - Put Reference and Value beside vertical parts and keep text off power symbols by @nyagamunene in #227
  • SYN-231 - Place a net-less board feature on the border, not in the circuit by @JeffMboya in #237
  • NOISSUE - Take the webpki versions the advisory database now requires by @JeffMboya in #248
  • SYN-136 - Declare via-in-pad on the board and the profile, not the command line by @JeffMboya in #155
  • NOISSUE - Enforce complete frozen costs and procurement locks by @SammyOina in #220
  • SYN-206 - Move net label flags out of each other's way by @nyagamunene in #228
  • SYN-245 - Drain a check stage's pipes instead of polling around them by @JeffMboya in #246
  • SYN-232 - Let a clock arrive through its series damping resistor by @JeffMboya in #236
  • SYN-207 - Turn an LED so its anode faces its resistor and keep pull resistors out of flag columns by @nyagamunene in #238
  • SYN-136 - A netclass declares the via its nets escape through by @JeffMboya in #170
  • SYN-203 - Keep a power symbol name clear of near misses by @nyagamunene in #239
  • NOISSUE - Turn a power symbol sideways when upright it would sit on a neighbouring pin by @nyagamunene in #241
  • SYN-226 - Fill the page with regions cut by a slicing floorplan by @nyagamunene in #242
  • NOISSUE - Refuse to continue when apt falls back to the archive's KiCad 7 by @JeffMboya in #251
  • NOISSUE - Draw regions as one outline and wire a net inside each region by @nyagamunene in #259
  • NOISSUE - A resistor divider is not a pull-up by @JeffMboya in #255
  • SYN-256 - A pinned component is a placement constraint, not a correction by @JeffMboya in #257
  • SYN-136 - The via-in-pad override reaches the gate that blocks on it by @JeffMboya in #250
  • NOISSUE - Shrink auto-fitted board area by @nyagamunene in #272
  • NOISSUE - Rank export placements by shape and connector edge contracts by @nyagamunene in #306
  • NOISSUE - Isolate FreeRouting post-processing from KiCad SWIG state by @SammyOina in #319
  • NOISSUE - Reduce board area with outline packing and a size-based export rim by @nyagamunene in #304
  • Bug: a reset button is not held to its MCU by @JeffMboya in #284
  • Bug: the router helper is only found from inside a Synth checkout, though the capability check says it is available by @JeffMboya in #286
  • Bug: the Power net class asks KiCad for 0.2 mm clearance, but the project file the router reads says 0.127 mm by @JeffMboya in #288
  • Bug: the routing result reports a DRC violation count but not which violations by @JeffMboya in #291
  • Bug: the synth_export description promises Gerber files that no input produces by @JeffMboya in #295
  • Bug: synth_export reads the placement sidecar as the schematic layout when only layout_file_path is given by @JeffMboya in #301
  • Bug: a net drawn as a plain wire gets no net class in the project file, so it routes at the default width by @JeffMboya in #303
  • Bug: a ground pour split by tracks leaves an island with no via, and nothing ties it back by @JeffMboya in #289
  • Bug: the board file fixes the minimum via at 0.60 mm, so a legal 0.56 mm via fails DRC by @JeffMboya in #316
  • Bug: E-SYNTH-PROCESS-002 does not say which manufacturer profile offers via-in-pad by @JeffMboya in #318
  • Bug: placement review does not flag a reset button far from its MCU by @JeffMboya in #293
  • Bug: the synth_export result repeats one schematic finding until the agent cannot read it by @JeffMboya in #297
  • Bug: the ground tie and return vias can land inside a ground pad, which the release gate refuses by @JeffMboya in #314
  • Bug: a signal via on a two-layer board has no ground return via beside it by @JeffMboya in #299
  • NOISSUE - Add the RS-485 surge parts to the registry by @nyagamunene in #356
  • SYN-66 - USB-C dual-UART and RS-485 adapter board by @nyagamunene in #103
  • Bug: a connector hinted to one edge but sitting on another undoes its neighbours' flush edge by @JeffMboya in #335
  • Bug: placement review does not warn that an external connector sits inside the board edge by @JeffMboya in #337
  • Bug: synth_export reports a board fabrication-ready when a part's footprint is not in the KiCad library by @JeffMboya in #339
  • Bug: export-kicad routes with the project a previous export left in the output directory by @JeffMboya in #350
  • Bug: a connector turned to face the board edge can leave the board by @JeffMboya in #355
  • Bug: connectors hinted to the same edge share one slot, so one is pushed off the edge by @JeffMboya in #341
  • Bug: a long synth_export sends no progress, so the MCP client aborts it as hung by @JeffMboya in #308
  • Bug: synth_author_part writes no footprint_dimensions, which the registry requires of every part by @JeffMboya in #310
  • Bug: placement review does not warn that a support part sits far from the pin it serves by @JeffMboya in #343
  • Feature: compact a sidecar layout until the router no longer closes by @JeffMboya in #352
  • Add the six registry parts the Class A I2C sensor node needs by @JeffMboya in #322
  • Follow-up: make automatic return-via repair fail closed and match DRC ground classification by @JeffMboya in #358
  • Bug: d_schottky names a through-hole MPN for a SOD-123 footprint by @JeffMboya in #372
  • Class A, case 4: Negative case: missing power pins, unconnected required pins, duplicate references, and impossible footprint by @JeffMboya in #267
  • Add the five registry parts the Class A Protected Power Hub needs by @JeffMboya in #324
  • Bug: golden schematic fingerprints fail on main in CI shard 2 by @JeffMboya in #395
  • Bug: placement review does not warn that identical circuits are laid out differently by @JeffMboya in #345
  • SYN-67 - Add a 24 V buck board with power-good and thermal copper to the Class B matrix by @nyagamunene in #110
  • NOISSUE - Route KiCadRoutingTools with a high via cost first by @nyagamunene in #382
  • Bug: place_route_iterate has no time budget, so one export call can run for an hour by @JeffMboya in #312
  • SYN-265 - The APDS-9301, and a circular courtyard that read as no courtyard by @JeffMboya in #266
  • build(deps): bump the cargo-dependency group with 10 updates by @dependabot[bot] in #401
  • SYN-40 - A component declares how its pins escape by @JeffMboya in #164
  • Add a placement fitness report by @nyagamunene in #400
  • SYN-39 - Complete the pin maps of 22 parts that cannot be exported for fabrication by @JeffMboya in #195
  • SYN-40 - A JLCPCB tier that can drill the holes a module footprint ships by @JeffMboya in #254
  • SYN-229 - Put three registry parts on the pads and symbols KiCad ships by @JeffMboya in #235
  • Bug: a test point far from the pad it probes is not flagged by @JeffMboya in #348
  • Island repair reports a pad joined by a track chain as an island by @JeffMboya in #368
  • Add the eight registry parts the Class A irrigation controller needs by @JeffMboya in #326
  • SYN-165 - Stitch a boxed-in plane pad through the pad it declared for by @JeffMboya in #166
  • CI: run the KiCad jobs on ubuntu-24.04, not ubuntu-latest by @rodneyosodo in #406
  • SYN-40 - Escape dense grid arrays before the general router sees them by @JeffMboya in #161
  • NOISSUE - Reconcile the buck reviewer status with the registry by @nyagamunene in #404
  • Improve component density and layout quality by @JeffMboya in #370
  • NOISSUE - Add per-instance lcsc_pn and mpn to components by @nyagamunene in #413
  • Bug: the return-via repair blocks a release on every net, though W-SYNTH-DRC-016 is advisory by @JeffMboya in #394
  • Feature: export vias and mask clearing JLCPCB DFM warnings by @JeffMboya in #388
  • Class A, case 2: I2C/SPI sensor board with regulator, decoupling, pull-ups, and external connector by @JeffMboya in #268
  • SYN-420 - Lay out each split sheet as its own page by @nyagamunene in #421
  • Class A, case 3: Protected power-entry board with reverse-polarity and over-current components by @JeffMboya in #269
  • NOISSUE - Reject a registry pin whose role contradicts its KiCad symbol by @JeffMboya in #253
  • SYN-157 - Parts do not match the KiCad libraries they name by @JeffMboya in #159
  • Fix connectivity, USB-C CC and sidecar drift; correct registry parts; add Ethernet parts and netclass layer pins by @rodneyosodo in #405
  • NOISSUE - Move the PCB reader into synth-drc by @nyagamunene in #437
  • NOISSUE - Restructure the README and rewrite the user-facing docs as step-by-step guides by @rodneyosodo in #443
  • chore: release version 0.1.2 by @rodneyosodo in #444

Full Changelog: v0.1.1...v0.1.2

Contributors

dependabot, rodneyosodo, and 3 other contributors
Assets 12
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