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@hierophect hierophect commented Nov 4, 2019

This PR adds support for DisplayIO to the STM32 port, using a stub for ParallelBus for now. Tested with an SSD1306 on the Feather_STM32F405_Express. PWMOut is a prerequisite to this branch.

Additionally, this PR suggests two new definitions to be added to the common hal in shared-bindings, common_hal_reset_pin, and common_hal_never_reset_pin. These avoid exposing the internal structure of the pin object, which varies between ports. They do not replace the port level versions and should not affect other parts of circuitpython other than DisplayIO.

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ladyada commented Nov 4, 2019

ok this is dependant on PWM so we need to get that merged in first :)
if you give me a bin ill try this with a TFT featherwing

@hierophect hierophect requested a review from dhalbert November 4, 2019 19:14
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ok this is dependant on PWM so we need to get that merged in first :)
if you give me a bin ill try this with a TFT featherwing

oh right boo git CI. Here's a bin for the build
firmware.bin.zip

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ladyada commented Nov 4, 2019

oled does work, but TFT ILI341 did not, i do see the right pins toggling so a little mysterious. will require more research!

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hierophect commented Nov 4, 2019

@ladyada isn't the TFT a 8 line parallel bus architecture? That's stubbed right now as per @tannewt's instructions

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ladyada commented Nov 4, 2019

no
i verified the hardware connectivity with
https://raw.githubusercontent.com/adafruit/Adafruit_CircuitPython_RGB_Display/master/examples/rgb_display_ili9341test.py
so its def something odd happening in displayio but not sure what

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@ladyada is this the tft featherwing? The 2.4" one?

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ladyada commented Nov 4, 2019

yes, the 2.4" is ILI9341, the 3.5" ix HX8357D

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Got it. I can take a closer look as soon as the A2 Saleae frees up again (should I request one of those?)

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ladyada commented Nov 4, 2019

yes order a https://www.adafruit.com/product/2512

@hierophect hierophect requested a review from ladyada November 5, 2019 15:59
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ladyada commented Nov 5, 2019

hiya is there something for me to re-review?

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@ladyada no sorry I just noticed you weren't being tracked as a reviewer. Were you still digging into the TFT issue? If you'd like me to pick up on that instead, could you let me know what issues you were seeing in a little more detail so I can hone in on it?

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ladyada commented Nov 5, 2019

i have not done any digging into the TFT issue, you can spend 3-4 hours trying to debug it. if you have not figured it out by then, post here

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Thanks for adding the shared pin level reset. Makes total sense to not expose the struct members outside of the port.

A couple small suggestions but good otherwise.

Comment on lines +40 to +41
void common_hal_never_reset_pin(const mcu_pin_obj_t* pin);
void common_hal_reset_pin(const mcu_pin_obj_t* pin);
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I know this hasn't been said anywhere but I only use the common_hal_ prefix for shared API that maps to Python API. For cross-port functions, they should just be added here without a prefix like assert_pin and assert_pin_free already.

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@hierophect hierophect Nov 12, 2019

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That makes total sense, but now I'm not really sure what to name these. I was reluctant to redo the original functions so I wouldn't risk breaking functionality in other sections of the ports and shared bindings, so I mimicked what was done with common_hal_mcu_pin_is_free, which is a common-hal alias on top of a port-level function.

It seems like there's a distinction between functions and structures that ONLY exist at the port level, which are essentially helpers, and stuff that's exposed in shared bindings, even if it isn't a 1:1 map to python. Do you think a new prefix would be appropriate for functions like this? port_hal or some such?

@hierophect hierophect requested a review from tannewt November 12, 2019 17:52
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@ladyada regarding TFT featherwing: logic analyzer comparison to reveals that there's no obvious pin level issues with the SPI connection, such as something being disabled or otherwise not communicating properly. The two feathers both have active SPI but send very different data on different intervals.

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@ladyada I've confirmed SPI is still working fine with the NOR flash chips and my other screens and devices, so the issue with this may be coupled to the python component. I'll do my best to try and figure it out but anyone you can think of with more python experience would be a welcome testing addition.

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ladyada commented Nov 12, 2019

please get all other issues/PRs for STM resolved, and we'll visit this after

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please get all other issues/PRs for STM resolved, and we'll visit this after

Should this PR still get merged, for other displays? Or should it wait on the TFT issue?

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ladyada commented Nov 12, 2019

it should wait becuse there is some underlying issue

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Closing due to re-forking to fix merge issues.

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