Skip to content

Add support for QMTech Boards EP4CE15, EP4CE55, 5CEFA2, 10CL006 and XC7A35T and their common daughterboard #154

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
hansfbaier wants to merge 1 commit into from
Closed

Add support for QMTech Boards EP4CE15, EP4CE55, 5CEFA2, 10CL006 and XC7A35T and their common daughterboard #154

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
131 changes: 131 additions & 0 deletions nmigen_boards/qmtech_10cl006.py
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,131 @@
import os
import subprocess

from nmigen.build import *
from nmigen.vendor.intel import *
from nmigen_boards.resources import *
from nmigen_boards.qmtech_daughterboard import QMTechDaughterboard


__all__ = ["QMTech10CL006Platform"]


class QMTech10CL006Platform(IntelPlatform):
device = "10CL006"
package = "YU256"
speed = "C8G"
default_clk = "clk50"

def __init__(self, standalone=True):
if not standalone:
# D3 - we do not use LEDResources/ButtonResources here, because there are five LEDs
# on the daughterboard and this will then clash with those
self.resources[1] = Resource("core_led", 0, PinsN("L9"), Attrs(io_standard="3.3-V LVTTL"))
self.resources[2] = Resource("core_button", 0, PinsN("F3"), Attrs(io_standard="3.3-V LVTTL"))
self.resources[3] = Resource("core_button", 1, PinsN("J6"), Attrs(io_standard="3.3-V LVTTL"))
daughterboard = QMTechDaughterboard(Attrs(io_standard="3.3-V LVTTL"))
self.connectors += daughterboard.connectors
self.resources += daughterboard.resources

super().__init__()

resources = [
Resource("clk50", 0, Pins("E1", dir="i"),
Clock(50e6), Attrs(io_standard="3.3-V LVTTL")),

*LEDResources(
pins="L9",
attrs=Attrs(io_standard="3.3-V LVTTL")),

*ButtonResources(
pins="F3 J6", invert=True,
attrs=Attrs(io_standard="3.3-V LVTTL")),

*SPIFlashResources(0,
cs_n="D2", clk="H1", copi="C1", cipo="H2",
attrs=Attrs(io_standard="3.3-V LVTTL")),

SDRAMResource(0,
clk="P2", cke="R1", cs_n="P8", we_n="P6", ras_n="M8", cas_n="M7",
ba="N8 L8", a="R7 T7 R8 T8 R6 T5 R5 T4 R4 T3 T6 R3 T2",
dq="K5 L3 L4 K6 N3 M6 P3 N5 N2 N1 L1 L2 K1 K2 J1 J2", dqm="N6 P1",
attrs=Attrs(io_standard="3.3-V LVTTL")),
]

# The connectors are named after the daughterboard, not the core board
# because on the different core boards the names vary, but on the
# daughterboard they stay the same, which we need to connect the
# daughterboard peripherals to the core board.
# On this board J2 is U7 and J3 is U8
connectors = [
Connector("J", 2, {
# odd row even row
"7": "G1", "8": "G2",
"9": "D1", "10": "C2",
"11": "B1", "12": "F5",
"13": "D3", "14": "C3",
"15": "B3", "16": "A3",
"17": "B4", "18": "A4",
"19": "E5", "20": "A2",
"21": "D4", "22": "E6",
"23": "C6", "24": "D6",
"25": "B5", "26": "A5",
"27": "B6", "28": "A6",
"29": "B7", "30": "A7",
"31": "D8", "32": "C8",
"33": "D9", "34": "C9",
"35": "B8", "36": "A8",
"37": "B9", "38": "A9",
"39": "E9", "40": "E8",
"41": "E11", "42": "E10",
"43": "A10", "44": "B10",
"45": "D12", "46": "D11",
"47": "B11", "48": "A11",
"49": "B12", "50": "A12",
"51": "B13", "52": "A13",
"53": "B14", "54": "A14",
"55": "D14", "56": "C14",
"57": "B16", "58": "A15",
"59": "C16", "60": "C15",
}),
Connector("J", 3, {
# odd row even row
"7": "R9", "8": "T9",
"9": "R10", "10": "T10",
"11": "R11", "12": "T11",
"13": "R12", "14": "T12",
"15": "N9", "16": "M9",
"17": "M10", "18": "P9",
"19": "P11", "20": "N11",
"21": "R13", "22": "T13",
"23": "T15", "24": "T14",
"25": "N12", "26": "M11",
"27": "R14", "28": "N13",
"29": "N14", "30": "P14",
"31": "P16", "32": "R16",
"33": "N16", "34": "N15",
"35": "M16", "36": "M15",
"37": "L16", "38": "L15",
"39": "P15", "40": "M12",
"41": "L14", "42": "L13",
"43": "K16", "44": "K15",
"45": "K12", "46": "J12",
"47": "J14", "48": "J13",
"49": "K11", "50": "J11",
"51": "G11", "52": "F11",
"53": "F13", "54": "F14",
"55": "F10", "56": "F9",
"57": "E16", "58": "E15",
"59": "D16", "60": "D15",
})
]

def toolchain_program(self, products, name):
quartus_pgm = os.environ.get("QUARTUS_PGM", "quartus_pgm")
with products.extract("{}.sof".format(name)) as bitstream_filename:
subprocess.check_call([quartus_pgm, "--haltcc", "--mode", "JTAG",
"--operation", "P;" + bitstream_filename])

if __name__ == "__main__":
from nmigen_boards.test.blinky import Blinky
QMTech10CL006Platform(standalone=True).build(Blinky(), do_program=True)
131 changes: 131 additions & 0 deletions nmigen_boards/qmtech_5cefa2.py
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,131 @@
import os
import subprocess

from nmigen.build import *
from nmigen.vendor.intel import *
from nmigen_boards.resources import *
from nmigen_boards.qmtech_daughterboard import QMTechDaughterboard


__all__ = ["QMTech5CEFA2Platform"]


class QMTech5CEFA2Platform(IntelPlatform):
device = "5CEFA2"
package = "F23"
speed = "C8"
default_clk = "clk50"

def __init__(self, standalone=True):
if not standalone:
# D3 - we do not use LEDResources/ButtonResources here, because there are five LEDs
# on the daughterboard and this will then clash with those
self.resources[1] = Resource("core_led", 0, PinsN("D17"), Attrs(io_standard="3.3-V LVTTL"))
self.resources[2] = Resource("core_button", 0, PinsN("AB13"), Attrs(io_standard="3.3-V LVTTL"))
self.resources[3] = Resource("core_button", 1, PinsN("V18"), Attrs(io_standard="3.3-V LVTTL"))
daughterboard = QMTechDaughterboard(Attrs(io_standard="3.3-V LVTTL"))
self.connectors += daughterboard.connectors
self.resources += daughterboard.resources

super().__init__()

resources = [
Resource("clk50", 0, Pins("M9", dir="i"),
Clock(50e6), Attrs(io_standard="3.3-V LVTTL")),

*LEDResources(
pins="D17",
attrs=Attrs(io_standard="3.3-V LVTTL")),

*ButtonResources(
pins="AB13 V18", invert=True,
attrs=Attrs(io_standard="3.3-V LVTTL")),

*SPIFlashResources(0,
cs_n="R4", clk="V3", copi="AB4", cipo="AB3",
attrs=Attrs(io_standard="3.3-V LVTTL")),

SDRAMResource(0,
clk="AB11", cke="V9", cs_n="AB5", we_n="W9", ras_n="AB6", cas_n="AA7",
ba="T7 P9", a="P8 P7 N8 N6 U6 U7 V6 U8 T8 W8 R6 T9 Y9",
dq="AA12 Y11 AA10 AB10 Y10 AA9 AB8 AA8 U10 T10 U11 R12 U12 P12 R10 R11", dqm="AB7 V10",
attrs=Attrs(io_standard="3.3-V LVTTL")),
]

# The connectors are named after the daughterboard, not the core board
# because on the different core boards the names vary, but on the
# daughterboard they stay the same, which we need to connect the
# daughterboard peripherals to the core board.
# On this board J2 is U7 and J3 is U8
connectors = [
Connector("J", 2, {
# odd row even row
"7": "AA2", "8": "AA1",
"9": "Y3", "10": "W2",
"11": "U1", "12": "U2",
"13": "N1", "14": "N2",
"15": "L1", "16": "L2",
"17": "G1", "18": "G2",
"19": "E2", "20": "D3",
"21": "C1", "22": "C2",
"23": "G6", "24": "H6",
"25": "G8", "26": "H8",
"27": "F7", "28": "E7",
"29": "D6", "30": "C6",
"31": "E9", "32": "D9",
"33": "B5", "34": "A5",
"35": "B6", "36": "B7",
"37": "A7", "38": "A8",
"39": "A9", "40": "A10",
"41": "B10", "42": "C9",
"43": "G10", "44": "F10",
"45": "C11", "46": "B11",
"47": "B12", "48": "A12",
"49": "E12", "50": "D12",
"51": "D13", "52": "C13",
"53": "B13", "54": "A13",
"55": "A15", "56": "A14",
"57": "B15", "58": "C15",
"59": "C16", "60": "B16",
}),
Connector("J", 3, {
# odd row even row
"7": "AA14", "8": "AA13",
"9": "AA15", "10": "AB15",
"11": "Y15", "12": "Y14",
"13": "AB18", "14": "AB17",
"15": "Y17", "16": "Y16",
"17": "AA18", "18": "AA17",
"19": "AA20", "20": "AA19",
"21": "Y20", "22": "Y19",
"23": "AB21", "24": "AB20",
"25": "AA22", "26": "AB22",
"27": "W22", "28": "Y22",
"29": "Y21", "30": "W21",
"31": "U22", "32": "V21",
"33": "V20", "34": "W19",
"35": "U21", "36": "U20",
"37": "R22", "38": "T22",
"39": "P22", "40": "R21",
"41": "T20", "42": "T19",
"43": "P16", "44": "P17",
"45": "N20", "46": "N21",
"47": "M21", "48": "M20",
"49": "M18", "50": "N19",
"51": "L18", "52": "L19",
"53": "M22", "54": "L22",
"55": "L17", "56": "K17",
"57": "K22", "58": "K21",
"59": "M16", "60": "N16",
})
]

def toolchain_program(self, products, name):
quartus_pgm = os.environ.get("QUARTUS_PGM", "quartus_pgm")
with products.extract("{}.sof".format(name)) as bitstream_filename:
subprocess.check_call([quartus_pgm, "--haltcc", "--mode", "JTAG",
"--operation", "P;" + bitstream_filename])

if __name__ == "__main__":
from nmigen_boards.test.blinky import Blinky
QMTech5CEFA2Platform(standalone=True).build(Blinky(), do_program=True)
88 changes: 88 additions & 0 deletions nmigen_boards/qmtech_daughterboard.py
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,88 @@
from nmigen.build import *
from nmigen_boards.resources import *

__all__ = ["QMTechDaughterboard"]

class QMTechDaughterboard:
def __init__(self, attrs) -> None:
self.resources = [
UARTResource(0,
tx="J_2:15", rx="J_2:16",
attrs=attrs
),

*LEDResources(
pins="J_2:40 J_2:39 J_2:38 J_2:37 J_2:36", invert=True,
attrs=attrs),

*ButtonResources(
pins="J_3:7 J_2:44 J_2:43 J_2:42 J_2:41", invert=True,
attrs=attrs),

Resource("eth_gmii", 0,
Subsignal("rst", PinsN("-", dir="o")),
Subsignal("int", PinsN("J_3:26", dir="o")),
Subsignal("mdio", Pins("J_3:15", dir="io")),
Subsignal("mdc", Pins("J_3:16", dir="o")), # Max 8.3MHz
Subsignal("gtx_clk", Pins("J_3:29", dir="o")),
Subsignal("tx_clk", Pins("J_3:22", dir="i")),
Subsignal("tx_en", Pins("J_3:28", dir="o")),
Subsignal("tx_er", Pins("J_3:17", dir="o")),
Subsignal("tx_data", Pins("J_3:27 J_3:25 J_3:24 J_3:23 J_3:21 J_3:20 J_3:19 J_3:18", dir="o")),
Subsignal("rx_clk", Pins("J_3:37", dir="i")),
Subsignal("rx_dv", Pins("J_3:42", dir="i"), Attrs(PULLDOWN="TRUE")),
Subsignal("rx_er", Pins("J_3:32", dir="i")),
Subsignal("rx_data", Pins("J_3:41 J_3:40 J_3:39 J_3:38 J_3:36 J_3:35 J_3:34 J_3:33", dir="i")),
Subsignal("col", Pins("J_3:31", dir="i")),
Subsignal("crs", Pins("J_3:30", dir="i")),
attrs
),

# 3 digit 7 segment display
Display7SegResource(0,
a="J_2:31", b="J_2:26", c="J_2:28", d="J_2:32", e="J_2:34", f="J_2:29", g="J_2:25", dp="J_2:30",
invert=True, attrs=attrs),
Resource("display_7seg_ctrl", 0,
Subsignal("en", Pins("J_2:33 J_2:27 J_2:35", dir="o", invert=False)),
attrs
),

Resource("vga", 0,
Subsignal("r", Pins("J_3:57 J_3:56 J_3:59 J_3:58 J_3:60", dir="o")),
Subsignal("g", Pins("J_3:51 J_3:50 J_3:53 J_3:52 J_3:54 J_3:55", dir="o")),
Subsignal("b", Pins("J_3:46 J_3:45 J_3:48 J_3:47 J_3:49", dir="o")),
Subsignal("hs", Pins("J_3:44", dir="o")),
Subsignal("vs", Pins("J_3:43", dir="o")),
attrs
),

*SDCardResources(0, clk="J_3:11", cmd="J_3:12", dat0="J_3:10", dat1="J_3:9",
dat2="J_3:14", dat3="J_3:13", cd="J_3:8",
attrs=attrs),
]

connectors = [
Connector("pmod", 0, "J_2:17 J_2:19 J_2:21 J_2:23 - - J_2:18 J_2:20 J_2:22 J_2:24 - -"), #J10
Connector("pmod", 1, "J_2:7 J_2:9 J_2:11 J_2:13 - - J_2:8 J_2:10 J_2:12 J_2:14 - -"), #J11
Connector("J", 1, {
"3": "J_2:60",
"4": "J_2:59",
"5": "J_2:58",
"6": "J_2:57",
"7": "J_2:56",
"8": "J_2:55",
"9": "J_2:54",
"10": "J_2:53",
"11": "J_2:52",
"12": "J_2:51",
"13": "J_2:50",
"14": "J_2:49",
"15": "J_2:48",
"16": "J_2:47",
"17": "J_2:46",
"18": "J_2:45"
}), #J1
]

if __name__ == "__main__":
print("The class in this file serves as an extension to other platforms only and cannot be built on its own.")
Loading