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| 1 | +DEMO High-Performance Analog Meets AI |
| 2 | +=============================================================================== |
| 3 | + |
| 4 | +Extracting data from high-performance, high-data-rate analog signal chains for AI |
| 5 | +model training and real-time inference presents significant challenges due to the |
| 6 | +complexity of interfaces, processing, and integration requirements. Analog Devices |
| 7 | +addresses these challenges by providing a comprehensive, open-source data extraction |
| 8 | +and integration software stack, which ensures seamless connectivity between advanced |
| 9 | +signal chains and high-performance compute platforms. |
| 10 | + |
| 11 | + |
| 12 | +Resources |
| 13 | +------------------------------------------------------------------------------- |
| 14 | + |
| 15 | +- HDL branch: `adrv9009_qsfp_10G <https://github.com/analogdevicesinc/hdl/tree/adrv9009_qsfp_10G>`__ |
| 16 | +- Linux branch: `adr9009zu11eg_100MHZ_qsfp <https://github.com/analogdevicesinc/linux/tree/adr9009zu11eg_100MHZ_qsfp>`__ |
| 17 | +- Corundum branch: `corundum <https://github.com/ucsdsysnet/corundum.git>`__ |
| 18 | +- PyADI-IIO branch: `jupiter_modulation <https://github.com/analogdevicesinc/pyadi-iio/tree/jupiter_modulation>`__ |
| 19 | + |
| 20 | +Block diagram |
| 21 | +------------------------------------------------------------------------------- |
| 22 | + |
| 23 | +.. figure:: demo_block_diagram.svg |
| 24 | + :align: center |
| 25 | + :width: 900 |
| 26 | + |
| 27 | +Demo description |
| 28 | +------------------------------------------------------------------------------- |
| 29 | + |
| 30 | +This demo illustrates an AI-based multi-channel RF modulation scheme recognition |
| 31 | +workflow for signal intelligence applications. Four AD-JUPITER-EBZ systems are used |
| 32 | +to generate RF signals with different modulation schemes across a total of eight |
| 33 | +channels. The signals are then digitized by two ADRV9009-ZU11EG SoMs, which stream |
| 34 | +the raw IQ data to a host PC via 10Gb Ethernet links. The AI model, derived from |
| 35 | +a MathWorks reference design, is deployed on the NVIDIA GPU hosted in the PC. The |
| 36 | +NVIDIA Holoscan AI infrastructure manages the efficient transfer of data from the |
| 37 | +network interfaces into GPU memory, where the AI model is executed. By combining |
| 38 | +ADI’s high-performance data extraction infrastructure with MathWorks development |
| 39 | +tools and NVIDIA deployment frameworks, the system enables efficient AI application |
| 40 | +development and real-time execution for advanced signal intelligence tasks. |
| 41 | + |
| 42 | +.. figure:: demo_description.svg |
| 43 | + :align: center |
| 44 | + :width: 600 |
| 45 | + |
| 46 | +System Capabilities |
| 47 | +------------------------------------------------------------------------------- |
| 48 | + |
| 49 | +The system demonstrates an advanced, end-to-end data extraction and AI-based |
| 50 | +signal processing workflow designed for high-performance signal intelligence |
| 51 | +applications. It combines Analog Devices’ high-speed RF hardware and data |
| 52 | +infrastructure with third-party AI frameworks to deliver real-time modulation |
| 53 | +recognition and efficient AI model development. |
| 54 | + |
| 55 | +Key capabilities include: |
| 56 | + |
| 57 | +#. High-Performance Data Extraction |
| 58 | + |
| 59 | + * Supports real-time acquisition of high-bandwidth RF data from multi-channel signal chains. |
| 60 | + * Seamlessly bridges physical interfaces, FPGA-based logic, and low-level software drivers |
| 61 | + to enable reliable data transfer from ADI RF front ends to edge processors. |
| 62 | + * Flexible connectivity options, including Ethernet, PCIe, USB, and UART, allow integration |
| 63 | + with a wide range of compute platforms. |
| 64 | + |
| 65 | +#. Real-Time AI Modulation Recognition |
| 66 | + |
| 67 | + * Demonstrates multi-channel RF modulation scheme classification using AI models deployed on NVIDIA GPUs. |
| 68 | + * The NVIDIA Holoscan AI infrastructure ensures efficient data movement between network interfaces and |
| 69 | + GPU memory, supporting low-latency inference. |
| 70 | + |
| 71 | +#. Multi-Channel & Multi-Device Synchronization |
| 72 | + |
| 73 | + * Incorporates multiple AD-JUPITER-EBZ boards and ADRV9009-ZU11EG SoMs to generate and |
| 74 | + digitize RF signals across eight channels. |
| 75 | + * Provides accurate clock distribution and synchronization through AD-SYNCHRONA14-EBZ, |
| 76 | + ensuring deterministic latency and coherent signal processing across multiple systems. |
| 77 | + |
| 78 | +#. Seamless Data Integration Stack |
| 79 | + |
| 80 | + * Enables flexible partitioning of data flow between edge and host compute devices, improving |
| 81 | + scalability and system optimization. |
| 82 | + * Utilizes an open-source ADI software stack that simplifies the setup of data collection |
| 83 | + pipelines for AI model training and real-time inference. |
| 84 | + |
| 85 | +#. Integration with Industry-Standard AI Frameworks |
| 86 | + |
| 87 | + * Compatible with MathWorks reference designs for AI model generation, |
| 88 | + MATLAB-based workflows, NVIDIA Holoscan, and ROS2. |
| 89 | + * Bridges data science workflows with embedded environments to enable |
| 90 | + real-world dataset generation, model optimization, and deployment. |
| 91 | + |
| 92 | +#. End-to-End AI Development Ecosystem |
| 93 | + |
| 94 | + * ADI’s AI Fusion tools within CodeFusion Studio™ enable model optimization, deployment, |
| 95 | + and real-time performance analysis. |
| 96 | + * Supports rapid development cycles by providing actionable insights and performance metrics for system tuning. |
| 97 | + |
| 98 | +Required Hardware |
| 99 | +------------------------------------------------------------------------------- |
| 100 | + |
| 101 | +The following hardware components are required to set up and run the multi-channel RF modulation recognition demo: |
| 102 | + |
| 103 | +.. list-table:: |
| 104 | + :widths: 15 30 5 15 |
| 105 | + :header-rows: 1 |
| 106 | + |
| 107 | + * - Component |
| 108 | + - Role |
| 109 | + - Quantity |
| 110 | + - Notes |
| 111 | + * - :dokuwiki:`Jupiter SDR <resources/eval/user-guides/jupiter-sdr>` |
| 112 | + - Versatile 2 x RxTx software-defined-radio platform based on ADRV9002 and Xilinx Zynq UltraScale+ MPSoC. |
| 113 | + Generates RF signals with configurable modulation schemes. |
| 114 | + - 4 |
| 115 | + - Used to generate 8-channel RF input for AI recognition. |
| 116 | + * - :dokuwiki:`ADRV9009-ZU11EG RF-SOM <resources/eval/user-guides/adrv9009-zu11eg>` |
| 117 | + - RF System-on-Module with dual ADRV9009 wideband transceivers. Performs high-speed digitization and streaming of IQ data to the host. |
| 118 | + - 2 |
| 119 | + - Provides synchronized multi-channel data acquisition. |
| 120 | + * - :dokuwiki:`AD-SYNCHRONA14-EBZ <resources/eval/user-guides/ad-synchrona14-ebz>` |
| 121 | + - Clock synchronization and distribution board based on AD9545 and HMC7044. Ensures accurate multi-channel phase alignment. |
| 122 | + - 1 |
| 123 | + - Synchronizes all RF signal paths and data capture timing. |
| 124 | + * - NVIDIA IGX Orin platform |
| 125 | + - High-performance computing system with NVIDIA GPU acceleration. Runs Holoscan AI infrastructure and the AI modulation recognition model. |
| 126 | + - 1 |
| 127 | + - Requires 10Gb Ethernet connectivity. |
| 128 | + * - SMA Cables |
| 129 | + - RF connection between the SDR transmit and receive channels. |
| 130 | + - 8 |
| 131 | + - High-quality coaxial cables recommended for minimal signal loss. |
| 132 | + * - 100G QSFP28 Active Optical Cable |
| 133 | + - Provides high-speed data connection between the RF-SOM and the host compute platform. |
| 134 | + - 1 |
| 135 | + - Supports low-latency, high-bandwidth Ethernet link. |
| 136 | + * - Network switch with at least 4 PoE ports |
| 137 | + - Provides Ethernet connectivity and power delivery to connected devices. |
| 138 | + - 1 |
| 139 | + - Use a managed switch compatible with 10GbE interfaces. |
| 140 | + |
| 141 | +SD Card Configuration |
| 142 | +------------------------------------------------------------------------------- |
| 143 | + |
| 144 | +- For the Jupiter SDR platform, the boot files are generated using the Using Kuiper Image: |
| 145 | + |
| 146 | + `Writing the Image to an SD Card <https://analogdevicesinc.github.io/adi-kuiper-gen/use-kuiper-image.html>`__ |
| 147 | + |
| 148 | +- For the ADRV9009-ZU11EG, begin by checking out the HDL branch, then navigate to the **adrv2crr_fmc** directory. |
| 149 | + |
| 150 | +Run the following command to enable Corundum support and build the design: **make CORUNDUM=1** |
| 151 | +Once the build process is complete, generate the necessary boot files: boot.bin, device tree, and uImage by following |
| 152 | +the steps: |
| 153 | + |
| 154 | +- BOOT.BIN: `Build the boot image BOOT.BIN <https://analogdevicesinc.github.io/hdl/user_guide/build_boot_bin.html>`__ |
| 155 | +- Devicetree: :dokuwiki:`Building the Zynq Linux kernel and devicetrees from source <resources/tools-software/linux-build/generic/zynq?s%5b%5d=devicetree>` |
| 156 | + |
| 157 | +Capture in Data Using Scopy2.0 |
| 158 | +------------------------------------------------------------------------------- |
| 159 | + |
| 160 | +Captured RF Signal in Time Domain |
| 161 | + |
| 162 | +.. figure:: capture_time.jpg |
| 163 | + :align: center |
| 164 | + :width: 900 |
| 165 | + |
| 166 | +Captured RF Signal in Frequency Domain |
| 167 | + |
| 168 | +.. figure:: capture_frequency.jpg |
| 169 | + :align: center |
| 170 | + :width: 900 |
| 171 | + |
| 172 | +AI Modulation Detection Applications |
| 173 | +------------------------------------------------------------------------------- |
| 174 | + |
| 175 | + |
| 176 | +Software Configuration |
| 177 | +----------------------- |
| 178 | + |
| 179 | +.. toctree:: |
| 180 | + :maxdepth: 1 |
| 181 | + |
| 182 | + software/index |
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