Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
constraints		constraints
sim/sim_1/behav/xsim		sim/sim_1/behav/xsim
src		src
tb		tb
.gitignore		.gitignore
README.md		README.md
processor.xpr		processor.xpr

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4Bit CPU

4 Bit processor built for the Basys 3 FPGA board
Final project for ECE 2700 at USU

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4 bit processor created on an FPGA as a final project of ECE 2700 at USU

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