2424 *
2525 * @push and @pop may be asserted whenever.
2626 * FIFO does push operation when both @push/@ready_to_push asserted.
27- * FIFO does pop operation when all three @pop/@out_valid/@pop_enable asserted.
27+ * FIFO does pop operation when both @pop/@out_valid asserted.
2828 *
2929 * @push_enable used for MCP request FIFO and return 1 on matched clocks,
3030 * it restricts changing @read_to_push and @afull output, but not push operation.
3333 * Outputs @out_valid, @ready and @afull may be asserted asynchronously,
3434 * de-assertion is done synchronously only.
3535 *
36- * FIFO allows to pop an element in the same clock it is pushed into empty FIFO,
37- * to do that @out_valid and @data_valid are asserted asynchronously.
38- * FIFO provides asynchronous assertion @ready_to_push for full FIFO,
39- * if pop operation will be done next clock posedge.
40- * FIFO provides asynchronous assertion @almost_full when FIFO is one element
41- * lower than length and there is push and no pop. This feature is not MCP ready.
42- * De-assertion @out_valid, @ready_to_push, @almost_full is done synchronously!!!
36+ * The FIFO push and pop may be asserted whenever.
37+ * FIFO does push operation when both @push/@ready_to_push asserted.
38+ * FIFO does pop operation when both @pop/@out_valid asserted.
39+ * Outputs @out_valid, @ready_to_push and @almost_full may be asserted
40+ * combinationally, de-assertion of them is done synchronously only.
41+ *
42+ * The FIFO allows to pop an element in the same clock it is pushed into
43+ * empty FIFO, if ASYNC_VALID is true (@out_valid is asserted combinationally).
44+ *
45+ * The FIFO allows to push an element into full FIFO if there is pop operation
46+ * in the same clock, if ASYNC_READY is true (@ready_to_push is asserted
47+ * combinationally).
48+ *
49+ * The FIFO provides combinational assertion of @almost_full when FIFO is
50+ * one element lower than AFULL_ELEMENT_NUM and there is push and no pop.
51+ * This feature is not MCP ready.
52+ *
53+ * De-assertion @out_valid, @ready_to_push, @almost_full is done synchronously!
4354 *
4455 * Async @out_valid combinationally depends on @push.
4556 * Async @ready_to_push combinationally depends on @pop.
4960 * FIFO as well.
5061 */
5162
52- template <typename T,
53- bool ASYNC_VALID, // Set @out_valid asynchronously
54- bool ASYNC_READY, // Set @ready_to_push asynchronously
55- bool ASYNC_AFULL, // Set @almost_full asynchronously
56- unsigned FIFO_LENGTH,
57- unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
58- // when @is_almost_full is set high
59- bool INIT_BUFFER // Initialize @fifo_buffer in reset
60- >
63+ template <
64+ typename T, // FIFO slot data type
65+ bool ASYNC_VALID, // Assert @out_valid combinationally
66+ bool ASYNC_READY, // Assert @ready_to_push combinationally
67+ bool ASYNC_AFULL, // Assert @almost_full combinationally
68+ unsigned FIFO_LENGTH, // Number of FIFO slots
69+ unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
70+ // when @almost_full is asserted
71+ bool INIT_BUFFER // Initialize FIFO slots in reset with zeros
72+ >
6173class adv_fifo_base : public sc_module
6274{
6375 public:
64- sc_in_clk clk;
76+ // Common clock, positive edge is used
77+ sc_in_clk clk;
78+ // Asynchronous reset, low active
6579 sc_in<bool > nrst;
6680 // Push operation is performed without @enable checking for burst on core clock,
6781 // @push may be asserted when @ready_to_push is high only
6882 sc_in<bool > push;
83+ // Input data
6984 sc_in<T> data_in;
7085 // FIFO is ready to @push assert signal
7186 sc_out<bool > ready_to_push;
7287 // @pop may be asserted whenever, pop operation is done when @pop && @out_valid
7388 sc_in<bool > pop;
89+ // Output data
7490 sc_out<T> data_out;
75- // @data_out is valid signal
91+ // Output data is valid signal
7692 sc_out<bool > out_valid;
93+ // FIFO is almost full, number of free slots equal or less than @AFULL_ELEMENT_NUM
7794 sc_out<bool > almost_full;
7895
7996 SC_HAS_PROCESS (adv_fifo_base);
@@ -352,19 +369,20 @@ class adv_fifo_base : public sc_module
352369 }
353370};
354371
355- // =========================== Non -MCP FIFO === =============================
372+ // ========================= Normal (non -MCP) FIFO =============================
356373/* *
357- * Non -MCP FIFO
374+ * Normal (non -MCP) FIFO with signal interface
358375 */
359- template <typename T,
360- bool ASYNC_VALID, // Set @out_valid asynchronously
361- bool ASYNC_READY, // Set @ready_to_push asynchronously
362- bool ASYNC_AFULL, // Set @almost_full asynchronously
363- unsigned FIFO_LENGTH,
364- unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
365- // when @is_almost_full is set up
366- bool INIT_BUFFER = 0 // Initialize @fifo_buffer in reset
367- >
376+ template <
377+ typename T, // FIFO slot data type
378+ bool ASYNC_VALID, // Assert @out_valid combinationally
379+ bool ASYNC_READY, // Assert @ready_to_push combinationally
380+ bool ASYNC_AFULL, // Assert @almost_full combinationally
381+ unsigned FIFO_LENGTH, // Number of FIFO slots
382+ unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
383+ // when @almost_full is asserted
384+ bool INIT_BUFFER = 0 // Initialize FIFO slots in reset with zeros
385+ >
368386class adv_fifo
369387 : public adv_fifo_base<T, ASYNC_VALID, ASYNC_READY, ASYNC_AFULL,
370388 FIFO_LENGTH, AFULL_ELEMENT_NUM, INIT_BUFFER>
@@ -390,17 +408,18 @@ class adv_fifo
390408};
391409
392410/* *
393- * Non -MCP FIFO with function interface
411+ * Normal (non -MCP) FIFO with function interface
394412 */
395- template <typename T,
396- bool ASYNC_VALID, // Set @out_valid asynchronously
397- bool ASYNC_READY, // Set @ready_to_push asynchronously
398- bool ASYNC_AFULL, // Set @almost_full asynchronously
399- unsigned FIFO_LENGTH,
400- unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
401- // when @is_almost_full is set up
402- bool INIT_BUFFER = 0 // Initialize @fifo_buffer in reset
403- >
413+ template <
414+ typename T, // FIFO slot data type
415+ bool ASYNC_VALID, // Assert @out_valid combinationally
416+ bool ASYNC_READY, // Assert @ready_to_push combinationally
417+ bool ASYNC_AFULL, // Assert @almost_full combinationally
418+ unsigned FIFO_LENGTH, // Number of FIFO slots
419+ unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
420+ // when @almost_full is asserted
421+ bool INIT_BUFFER = 0 // Initialize FIFO slots in reset with zeros
422+ >
404423class adv_fifo_mif : public sc_module , public sc_interface
405424{
406425 protected:
@@ -446,10 +465,10 @@ class adv_fifo_mif : public sc_module, public sc_interface
446465 fifo.almost_full (full_sig);
447466 }
448467
449- // / Is ready to push
468+ // / FIFO is ready to push
450469 bool ready () { return ready_sig; }
451470
452- // / Push or clear push, push is ignored is FIFO is not ready to push
471+ // / Push or clear push, push is ignored if FIFO is not ready to push
453472 // / \return ready to push flag
454473 bool push (const T& data, bool push = true )
455474 {
@@ -458,17 +477,17 @@ class adv_fifo_mif : public sc_module, public sc_interface
458477 return ready_sig;
459478 }
460479
461- // / Is data valid, pop return can be used only if data is valid
480+ // / FIFO output data valid, pop return can be used only if data is valid
462481 bool valid () { return valid_sig; }
463482
464- // / Pop or get data
483+ // / Pop or get data from FIFO, do not remove data from FIFO if pop = false
465484 T pop (bool pop = true )
466485 {
467486 pop_sig = pop;
468487 return (T)data_out_sig.read ();
469488 }
470489
471- // / Is almost full, there is AFULL_ELEMENT_NUM elements or more used
490+ // / FIFO is almost full, there is AFULL_ELEMENT_NUM elements or more used
472491 bool full () { return full_sig; }
473492
474493 // / Add FIFO signals to sensitivity list
@@ -477,6 +496,7 @@ class adv_fifo_mif : public sc_module, public sc_interface
477496 s << ready_sig << valid_sig << data_out_sig << full_sig;
478497 }
479498
499+ // / Bind FIFO clock and reset
480500 template <typename CLK_t, typename RSTN_t>
481501 void clk_nrst (CLK_t& clk_in, RSTN_t& nrst_in)
482502 {
@@ -542,15 +562,16 @@ class adv_fifo<T, 1, 1, 1, 0, 0, 0> : public sc_module
542562 * @enable high allows to change @is_almost_full and @ready_to_push outputs,
543563 * push may happen if @enable is low!!!
544564 */
545- template <typename T,
546- bool ASYNC_VALID, // Set @out_valid asynchronously
547- bool ASYNC_READY, // Set @ready_to_push asynchronously
548- bool ASYNC_AFULL, // Set @almost_full asynchronously
549- unsigned FIFO_LENGTH,
550- unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
551- // when @is_almost_full is set up
552- bool INIT_BUFFER = 0 // Initialize @fifo_buffer in reset
553- >
565+ template <
566+ typename T, // FIFO slot data type
567+ bool ASYNC_VALID, // Assert @out_valid combinationally
568+ bool ASYNC_READY, // Assert @ready_to_push combinationally
569+ bool ASYNC_AFULL, // Assert @almost_full combinationally
570+ unsigned FIFO_LENGTH, // Number of FIFO slots
571+ unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
572+ // when @almost_full is asserted
573+ bool INIT_BUFFER = 0 // Initialize FIFO slots in reset with zeros
574+ >
554575class mcp_request_fifo
555576 : public adv_fifo_base<T, ASYNC_VALID, ASYNC_READY, ASYNC_AFULL,
556577 FIFO_LENGTH, AFULL_ELEMENT_NUM, INIT_BUFFER>
@@ -589,15 +610,16 @@ class mcp_request_fifo
589610 * @data_out may be changed without @enable, but it is read by @out_valid,
590611 * therefore skipped.
591612 */
592- template <typename T,
593- bool ASYNC_VALID, // Set @out_valid asynchronously
594- bool ASYNC_READY, // Set @ready_to_push asynchronously
595- bool ASYNC_AFULL, // Set @almost_full asynchronously
596- unsigned FIFO_LENGTH,
597- unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
598- // when @is_almost_full is set up
599- bool INIT_BUFFER = 0 // Initialize @fifo_buffer in reset
600- >
613+ template <
614+ typename T, // FIFO slot data type
615+ bool ASYNC_VALID, // Assert @out_valid combinationally
616+ bool ASYNC_READY, // Assert @ready_to_push combinationally
617+ bool ASYNC_AFULL, // Assert @almost_full combinationally
618+ unsigned FIFO_LENGTH, // Number of FIFO slots
619+ unsigned AFULL_ELEMENT_NUM, // Number of free element slots in FIFO
620+ // when @almost_full is asserted
621+ bool INIT_BUFFER = 0 // Initialize FIFO slots in reset with zeros
622+ >
601623class mcp_response_fifo
602624 : public adv_fifo_base<T, ASYNC_VALID, ASYNC_READY, ASYNC_AFULL,
603625 FIFO_LENGTH, AFULL_ELEMENT_NUM, INIT_BUFFER>
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