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Commit 029a40e

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andy-shevVinod Koul
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dmaengine: dw: provide DMA capabilities
The new DMAEngine requirement is to provide what the DMA controller can do, such as directions, bus widths, and residue granularity. The patch sets those properties for the DesignWare DMA controller driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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drivers/dma/dw/core.c

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,6 +61,13 @@
6161
*/
6262
#define NR_DESCS_PER_CHANNEL 64
6363

64+
/* The set of bus widths supported by the DMA controller */
65+
#define DW_DMA_BUSWIDTHS \
66+
BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \
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BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \
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BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
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BIT(DMA_SLAVE_BUSWIDTH_4_BYTES)
70+
6471
/*----------------------------------------------------------------------*/
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6673
static struct device *chan2dev(struct dma_chan *chan)
@@ -1660,8 +1667,8 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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dw->dma.device_free_chan_resources = dwc_free_chan_resources;
16611668

16621669
dw->dma.device_prep_dma_memcpy = dwc_prep_dma_memcpy;
1663-
16641670
dw->dma.device_prep_slave_sg = dwc_prep_slave_sg;
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dw->dma.device_config = dwc_config;
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dw->dma.device_pause = dwc_pause;
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dw->dma.device_resume = dwc_resume;
@@ -1670,6 +1677,13 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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dw->dma.device_tx_status = dwc_tx_status;
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dw->dma.device_issue_pending = dwc_issue_pending;
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1680+
/* DMA capabilities */
1681+
dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS;
1682+
dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS;
1683+
dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
1684+
BIT(DMA_MEM_TO_MEM);
1685+
dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
1686+
16731687
err = dma_async_device_register(&dw->dma);
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if (err)
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goto err_dma_register;

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