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LorenzoBianconikuba-moo
LorenzoBianconi
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kuba-moo
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net: ethernet: mtk_eth_soc: convert caps in mtk_soc_data struct to u64
This is a preliminary patch to introduce support for MT7988 SoC. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://lore.kernel.org/r/9499ac3670b2fc5b444404b84e8a4a169beabbf2.1690246066.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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‎drivers/net/ethernet/mediatek/mtk_eth_path.c‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -15,10 +15,10 @@
1515
struct mtk_eth_muxc {
1616
const char *name;
1717
int cap_bit;
18-
int (*set_path)(struct mtk_eth *eth, int path);
18+
int (*set_path)(struct mtk_eth *eth, u64 path);
1919
};
2020

21-
static const char *mtk_eth_path_name(int path)
21+
static const char *mtk_eth_path_name(u64 path)
2222
{
2323
switch (path) {
2424
case MTK_ETH_PATH_GMAC1_RGMII:
@@ -40,7 +40,7 @@ static const char *mtk_eth_path_name(int path)
4040
}
4141
}
4242

43-
static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, int path)
43+
static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, u64 path)
4444
{
4545
bool updated = true;
4646
u32 val, mask, set;
@@ -71,7 +71,7 @@ static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, int path)
7171
return 0;
7272
}
7373

74-
static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, int path)
74+
static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, u64 path)
7575
{
7676
unsigned int val = 0;
7777
bool updated = true;
@@ -94,7 +94,7 @@ static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, int path)
9494
return 0;
9595
}
9696

97-
static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, int path)
97+
static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, u64 path)
9898
{
9999
unsigned int val = 0, mask = 0, reg = 0;
100100
bool updated = true;
@@ -125,7 +125,7 @@ static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, int path)
125125
return 0;
126126
}
127127

128-
static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, int path)
128+
static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path)
129129
{
130130
unsigned int val = 0;
131131
bool updated = true;
@@ -163,7 +163,7 @@ static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, int path)
163163
return 0;
164164
}
165165

166-
static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, int path)
166+
static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path)
167167
{
168168
unsigned int val = 0;
169169
bool updated = true;
@@ -218,7 +218,7 @@ static const struct mtk_eth_muxc mtk_eth_muxc[] = {
218218
},
219219
};
220220

221-
static int mtk_eth_mux_setup(struct mtk_eth *eth, int path)
221+
static int mtk_eth_mux_setup(struct mtk_eth *eth, u64 path)
222222
{
223223
int i, err = 0;
224224

@@ -249,7 +249,7 @@ static int mtk_eth_mux_setup(struct mtk_eth *eth, int path)
249249

250250
int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id)
251251
{
252-
int path;
252+
u64 path;
253253

254254
path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII :
255255
MTK_ETH_PATH_GMAC2_SGMII;
@@ -260,7 +260,7 @@ int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id)
260260

261261
int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id)
262262
{
263-
int path = 0;
263+
u64 path = 0;
264264

265265
if (mac_id == 1)
266266
path = MTK_ETH_PATH_GMAC2_GEPHY;
@@ -274,7 +274,7 @@ int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id)
274274

275275
int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id)
276276
{
277-
int path;
277+
u64 path;
278278

279279
path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_RGMII :
280280
MTK_ETH_PATH_GMAC2_RGMII;

‎drivers/net/ethernet/mediatek/mtk_eth_soc.h‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -866,41 +866,41 @@ enum mkt_eth_capabilities {
866866
};
867867

868868
/* Supported hardware group on SoCs */
869-
#define MTK_RGMII BIT(MTK_RGMII_BIT)
870-
#define MTK_TRGMII BIT(MTK_TRGMII_BIT)
871-
#define MTK_SGMII BIT(MTK_SGMII_BIT)
872-
#define MTK_ESW BIT(MTK_ESW_BIT)
873-
#define MTK_GEPHY BIT(MTK_GEPHY_BIT)
874-
#define MTK_MUX BIT(MTK_MUX_BIT)
875-
#define MTK_INFRA BIT(MTK_INFRA_BIT)
876-
#define MTK_SHARED_SGMII BIT(MTK_SHARED_SGMII_BIT)
877-
#define MTK_HWLRO BIT(MTK_HWLRO_BIT)
878-
#define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT)
879-
#define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT)
880-
#define MTK_QDMA BIT(MTK_QDMA_BIT)
881-
#define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT)
882-
#define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT)
883-
#define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT)
869+
#define MTK_RGMII BIT_ULL(MTK_RGMII_BIT)
870+
#define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT)
871+
#define MTK_SGMII BIT_ULL(MTK_SGMII_BIT)
872+
#define MTK_ESW BIT_ULL(MTK_ESW_BIT)
873+
#define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT)
874+
#define MTK_MUX BIT_ULL(MTK_MUX_BIT)
875+
#define MTK_INFRA BIT_ULL(MTK_INFRA_BIT)
876+
#define MTK_SHARED_SGMII BIT_ULL(MTK_SHARED_SGMII_BIT)
877+
#define MTK_HWLRO BIT_ULL(MTK_HWLRO_BIT)
878+
#define MTK_SHARED_INT BIT_ULL(MTK_SHARED_INT_BIT)
879+
#define MTK_TRGMII_MT7621_CLK BIT_ULL(MTK_TRGMII_MT7621_CLK_BIT)
880+
#define MTK_QDMA BIT_ULL(MTK_QDMA_BIT)
881+
#define MTK_SOC_MT7628 BIT_ULL(MTK_SOC_MT7628_BIT)
882+
#define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT)
883+
#define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT)
884884

885885
#define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \
886-
BIT(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)
886+
BIT_ULL(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)
887887
#define MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY \
888-
BIT(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
888+
BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
889889
#define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \
890-
BIT(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
890+
BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
891891
#define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \
892-
BIT(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)
892+
BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)
893893
#define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \
894-
BIT(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT)
894+
BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT)
895895

896896
/* Supported path present on SoCs */
897-
#define MTK_ETH_PATH_GMAC1_RGMII BIT(MTK_ETH_PATH_GMAC1_RGMII_BIT)
898-
#define MTK_ETH_PATH_GMAC1_TRGMII BIT(MTK_ETH_PATH_GMAC1_TRGMII_BIT)
899-
#define MTK_ETH_PATH_GMAC1_SGMII BIT(MTK_ETH_PATH_GMAC1_SGMII_BIT)
900-
#define MTK_ETH_PATH_GMAC2_RGMII BIT(MTK_ETH_PATH_GMAC2_RGMII_BIT)
901-
#define MTK_ETH_PATH_GMAC2_SGMII BIT(MTK_ETH_PATH_GMAC2_SGMII_BIT)
902-
#define MTK_ETH_PATH_GMAC2_GEPHY BIT(MTK_ETH_PATH_GMAC2_GEPHY_BIT)
903-
#define MTK_ETH_PATH_GDM1_ESW BIT(MTK_ETH_PATH_GDM1_ESW_BIT)
897+
#define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT)
898+
#define MTK_ETH_PATH_GMAC1_TRGMII BIT_ULL(MTK_ETH_PATH_GMAC1_TRGMII_BIT)
899+
#define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)
900+
#define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)
901+
#define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)
902+
#define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT)
903+
#define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT)
904904

905905
#define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII)
906906
#define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII)
@@ -1045,7 +1045,7 @@ struct mtk_reg_map {
10451045
struct mtk_soc_data {
10461046
const struct mtk_reg_map *reg_map;
10471047
u32 ana_rgc3;
1048-
u32 caps;
1048+
u64 caps;
10491049
u32 required_clks;
10501050
bool required_pctl;
10511051
u8 offload_version;

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