2323#define PMUSERENR __ACCESS_CP15(c9, 0, c14, 0)
2424#define PMINTENSET __ACCESS_CP15(c9, 0, c14, 1)
2525#define PMINTENCLR __ACCESS_CP15(c9, 0, c14, 2)
26+ #define PMCEID2 __ACCESS_CP15(c9, 0, c14, 4)
27+ #define PMCEID3 __ACCESS_CP15(c9, 0, c14, 5)
2628#define PMMIR __ACCESS_CP15(c9, 0, c14, 6)
2729#define PMCCFILTR __ACCESS_CP15(c14, 0, c15, 7)
2830
@@ -150,21 +152,6 @@ static inline u64 read_pmccntr(void)
150152 return read_sysreg (PMCCNTR );
151153}
152154
153- static inline void write_pmxevcntr (u32 val )
154- {
155- write_sysreg (val , PMXEVCNTR );
156- }
157-
158- static inline u32 read_pmxevcntr (void )
159- {
160- return read_sysreg (PMXEVCNTR );
161- }
162-
163- static inline void write_pmxevtyper (u32 val )
164- {
165- write_sysreg (val , PMXEVTYPER );
166- }
167-
168155static inline void write_pmcntenset (u32 val )
169156{
170157 write_sysreg (val , PMCNTENSET );
@@ -205,16 +192,6 @@ static inline void write_pmuserenr(u32 val)
205192 write_sysreg (val , PMUSERENR );
206193}
207194
208- static inline u32 read_pmceid0 (void )
209- {
210- return read_sysreg (PMCEID0 );
211- }
212-
213- static inline u32 read_pmceid1 (void )
214- {
215- return read_sysreg (PMCEID1 );
216- }
217-
218195static inline void kvm_set_pmu_events (u32 set , struct perf_event_attr * attr ) {}
219196static inline void kvm_clr_pmu_events (u32 clr ) {}
220197static inline bool kvm_pmu_counter_deferred (struct perf_event_attr * attr )
@@ -231,6 +208,7 @@ static inline void kvm_vcpu_pmu_resync_el0(void) {}
231208
232209/* PMU Version in DFR Register */
233210#define ARMV8_PMU_DFR_VER_NI 0
211+ #define ARMV8_PMU_DFR_VER_V3P1 0x4
234212#define ARMV8_PMU_DFR_VER_V3P4 0x5
235213#define ARMV8_PMU_DFR_VER_V3P5 0x6
236214#define ARMV8_PMU_DFR_VER_IMP_DEF 0xF
@@ -251,4 +229,24 @@ static inline bool is_pmuv3p5(int pmuver)
251229 return pmuver >= ARMV8_PMU_DFR_VER_V3P5 ;
252230}
253231
232+ static inline u64 read_pmceid0 (void )
233+ {
234+ u64 val = read_sysreg (PMCEID0 );
235+
236+ if (read_pmuver () >= ARMV8_PMU_DFR_VER_V3P1 )
237+ val |= (u64 )read_sysreg (PMCEID2 ) << 32 ;
238+
239+ return val ;
240+ }
241+
242+ static inline u64 read_pmceid1 (void )
243+ {
244+ u64 val = read_sysreg (PMCEID1 );
245+
246+ if (read_pmuver () >= ARMV8_PMU_DFR_VER_V3P1 )
247+ val |= (u64 )read_sysreg (PMCEID3 ) << 32 ;
248+
249+ return val ;
250+ }
251+
254252#endif
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