Skip to content

Commit 5f54ba8

Browse files
swvrrhswvrrh
committed
Merge: MKTME/TDX fixes for boot failures
MR: https://gitlab.com/redhat/rhel/src/kernel/rhel-9/-/merge_requests/1343 # Merge Request Required Information ## Summary of Changes This fixes boot on TDX-enabled systems, which until now only worked with "disable_mtrr_cleanup". Without the patch, the values written to the MTRRs mask registers were 52-bit wide (e.g. 0x000fffff_80000800) and the writes failed; with the patch, the values are 46-bit wide, which matches the reduced MAXPHYADDR that is shown in /proc/cpuinfo. ## Approved Development Ticket All submissions to CentOS Stream must reference an approved ticket in [Red Hat Jira](https://issues.redhat.com/). Please follow the CentOS Stream [contribution documentation](https://docs.centos.org/en-US/stream-contrib/quickstart/) for how to file this ticket and have it approved. ``` JIRA: https://issues.redhat.com/browse/RHEL-23426 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> ``` Approved-by: David Arcari <darcari@redhat.com> Approved-by: Vitaly Kuznetsov <vkuznets@redhat.com> Approved-by: Steve Best <sbest@redhat.com> Merged-by: Scott Weaver <scweaver@redhat.com>
2 parents 79eabbb + f4d3398 commit 5f54ba8

File tree

2 files changed

+114
-104
lines changed

2 files changed

+114
-104
lines changed

‎arch/x86/kernel/cpu/common.c‎

Lines changed: 23 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1172,18 +1172,34 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
11721172
void get_cpu_address_sizes(struct cpuinfo_x86 *c)
11731173
{
11741174
u32 eax, ebx, ecx, edx;
1175+
bool vp_bits_from_cpuid = true;
11751176

1176-
if (c->extended_cpuid_level >= 0x80000008) {
1177+
if (!cpu_has(c, X86_FEATURE_CPUID) ||
1178+
(c->extended_cpuid_level < 0x80000008))
1179+
vp_bits_from_cpuid = false;
1180+
1181+
if (vp_bits_from_cpuid) {
11771182
cpuid(0x80000008, &eax, &ebx, &ecx, &edx);
11781183

11791184
c->x86_virt_bits = (eax >> 8) & 0xff;
11801185
c->x86_phys_bits = eax & 0xff;
1186+
} else {
1187+
if (IS_ENABLED(CONFIG_X86_64)) {
1188+
c->x86_clflush_size = 64;
1189+
c->x86_phys_bits = 36;
1190+
c->x86_virt_bits = 48;
1191+
} else {
1192+
c->x86_clflush_size = 32;
1193+
c->x86_virt_bits = 32;
1194+
c->x86_phys_bits = 32;
1195+
1196+
if (cpu_has(c, X86_FEATURE_PAE) ||
1197+
cpu_has(c, X86_FEATURE_PSE36))
1198+
c->x86_phys_bits = 36;
1199+
}
11811200
}
1182-
#ifdef CONFIG_X86_32
1183-
else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
1184-
c->x86_phys_bits = 36;
1185-
#endif
11861201
c->x86_cache_bits = c->x86_phys_bits;
1202+
c->x86_cache_alignment = c->x86_clflush_size;
11871203
}
11881204

11891205
static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
@@ -1599,17 +1615,6 @@ static void __init cpu_parse_early_param(void)
15991615
*/
16001616
static void __init early_identify_cpu(struct cpuinfo_x86 *c)
16011617
{
1602-
#ifdef CONFIG_X86_64
1603-
c->x86_clflush_size = 64;
1604-
c->x86_phys_bits = 36;
1605-
c->x86_virt_bits = 48;
1606-
#else
1607-
c->x86_clflush_size = 32;
1608-
c->x86_phys_bits = 32;
1609-
c->x86_virt_bits = 32;
1610-
#endif
1611-
c->x86_cache_alignment = c->x86_clflush_size;
1612-
16131618
memset(&c->x86_capability, 0, sizeof(c->x86_capability));
16141619
c->extended_cpuid_level = 0;
16151620

@@ -1622,8 +1627,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
16221627
get_cpu_vendor(c);
16231628
get_cpu_cap(c);
16241629
get_model_name(c); /* RHEL: get model name for unsupported check */
1625-
get_cpu_address_sizes(c);
16261630
setup_force_cpu_cap(X86_FEATURE_CPUID);
1631+
get_cpu_address_sizes(c);
16271632
cpu_parse_early_param();
16281633

16291634
if (this_cpu->c_early_init)
@@ -1636,6 +1641,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
16361641
this_cpu->c_bsp_init(c);
16371642
} else {
16381643
setup_clear_cpu_cap(X86_FEATURE_CPUID);
1644+
get_cpu_address_sizes(c);
16391645
}
16401646

16411647
setup_force_cpu_cap(X86_FEATURE_ALWAYS);

‎arch/x86/kernel/cpu/intel.c‎

Lines changed: 91 additions & 87 deletions
Original file line numberDiff line numberDiff line change
@@ -181,6 +181,90 @@ static bool bad_spectre_microcode(struct cpuinfo_x86 *c)
181181
return false;
182182
}
183183

184+
#define MSR_IA32_TME_ACTIVATE 0x982
185+
186+
/* Helpers to access TME_ACTIVATE MSR */
187+
#define TME_ACTIVATE_LOCKED(x) (x & 0x1)
188+
#define TME_ACTIVATE_ENABLED(x) (x & 0x2)
189+
190+
#define TME_ACTIVATE_POLICY(x) ((x >> 4) & 0xf) /* Bits 7:4 */
191+
#define TME_ACTIVATE_POLICY_AES_XTS_128 0
192+
193+
#define TME_ACTIVATE_KEYID_BITS(x) ((x >> 32) & 0xf) /* Bits 35:32 */
194+
195+
#define TME_ACTIVATE_CRYPTO_ALGS(x) ((x >> 48) & 0xffff) /* Bits 63:48 */
196+
#define TME_ACTIVATE_CRYPTO_AES_XTS_128 1
197+
198+
/* Values for mktme_status (SW only construct) */
199+
#define MKTME_ENABLED 0
200+
#define MKTME_DISABLED 1
201+
#define MKTME_UNINITIALIZED 2
202+
static int mktme_status = MKTME_UNINITIALIZED;
203+
204+
static void detect_tme_early(struct cpuinfo_x86 *c)
205+
{
206+
u64 tme_activate, tme_policy, tme_crypto_algs;
207+
int keyid_bits = 0, nr_keyids = 0;
208+
static u64 tme_activate_cpu0 = 0;
209+
210+
rdmsrl(MSR_IA32_TME_ACTIVATE, tme_activate);
211+
212+
if (mktme_status != MKTME_UNINITIALIZED) {
213+
if (tme_activate != tme_activate_cpu0) {
214+
/* Broken BIOS? */
215+
pr_err_once("x86/tme: configuration is inconsistent between CPUs\n");
216+
pr_err_once("x86/tme: MKTME is not usable\n");
217+
mktme_status = MKTME_DISABLED;
218+
219+
/* Proceed. We may need to exclude bits from x86_phys_bits. */
220+
}
221+
} else {
222+
tme_activate_cpu0 = tme_activate;
223+
}
224+
225+
if (!TME_ACTIVATE_LOCKED(tme_activate) || !TME_ACTIVATE_ENABLED(tme_activate)) {
226+
pr_info_once("x86/tme: not enabled by BIOS\n");
227+
mktme_status = MKTME_DISABLED;
228+
return;
229+
}
230+
231+
if (mktme_status != MKTME_UNINITIALIZED)
232+
goto detect_keyid_bits;
233+
234+
pr_info("x86/tme: enabled by BIOS\n");
235+
236+
tme_policy = TME_ACTIVATE_POLICY(tme_activate);
237+
if (tme_policy != TME_ACTIVATE_POLICY_AES_XTS_128)
238+
pr_warn("x86/tme: Unknown policy is active: %#llx\n", tme_policy);
239+
240+
tme_crypto_algs = TME_ACTIVATE_CRYPTO_ALGS(tme_activate);
241+
if (!(tme_crypto_algs & TME_ACTIVATE_CRYPTO_AES_XTS_128)) {
242+
pr_err("x86/mktme: No known encryption algorithm is supported: %#llx\n",
243+
tme_crypto_algs);
244+
mktme_status = MKTME_DISABLED;
245+
}
246+
detect_keyid_bits:
247+
keyid_bits = TME_ACTIVATE_KEYID_BITS(tme_activate);
248+
nr_keyids = (1UL << keyid_bits) - 1;
249+
if (nr_keyids) {
250+
pr_info_once("x86/mktme: enabled by BIOS\n");
251+
pr_info_once("x86/mktme: %d KeyIDs available\n", nr_keyids);
252+
} else {
253+
pr_info_once("x86/mktme: disabled by BIOS\n");
254+
}
255+
256+
if (mktme_status == MKTME_UNINITIALIZED) {
257+
/* MKTME is usable */
258+
mktme_status = MKTME_ENABLED;
259+
}
260+
261+
/*
262+
* KeyID bits effectively lower the number of physical address
263+
* bits. Update cpuinfo_x86::x86_phys_bits accordingly.
264+
*/
265+
c->x86_phys_bits -= keyid_bits;
266+
}
267+
184268
static void early_init_intel(struct cpuinfo_x86 *c)
185269
{
186270
u64 misc_enable;
@@ -332,6 +416,13 @@ static void early_init_intel(struct cpuinfo_x86 *c)
332416
*/
333417
if (detect_extended_topology_early(c) < 0)
334418
detect_ht_early(c);
419+
420+
/*
421+
* Adjust the number of physical bits early because it affects the
422+
* valid bits of the MTRR mask registers.
423+
*/
424+
if (cpu_has(c, X86_FEATURE_TME))
425+
detect_tme_early(c);
335426
}
336427

337428
static void bsp_init_intel(struct cpuinfo_x86 *c)
@@ -492,90 +583,6 @@ static void srat_detect_node(struct cpuinfo_x86 *c)
492583
#endif
493584
}
494585

495-
#define MSR_IA32_TME_ACTIVATE 0x982
496-
497-
/* Helpers to access TME_ACTIVATE MSR */
498-
#define TME_ACTIVATE_LOCKED(x) (x & 0x1)
499-
#define TME_ACTIVATE_ENABLED(x) (x & 0x2)
500-
501-
#define TME_ACTIVATE_POLICY(x) ((x >> 4) & 0xf) /* Bits 7:4 */
502-
#define TME_ACTIVATE_POLICY_AES_XTS_128 0
503-
504-
#define TME_ACTIVATE_KEYID_BITS(x) ((x >> 32) & 0xf) /* Bits 35:32 */
505-
506-
#define TME_ACTIVATE_CRYPTO_ALGS(x) ((x >> 48) & 0xffff) /* Bits 63:48 */
507-
#define TME_ACTIVATE_CRYPTO_AES_XTS_128 1
508-
509-
/* Values for mktme_status (SW only construct) */
510-
#define MKTME_ENABLED 0
511-
#define MKTME_DISABLED 1
512-
#define MKTME_UNINITIALIZED 2
513-
static int mktme_status = MKTME_UNINITIALIZED;
514-
515-
static void detect_tme(struct cpuinfo_x86 *c)
516-
{
517-
u64 tme_activate, tme_policy, tme_crypto_algs;
518-
int keyid_bits = 0, nr_keyids = 0;
519-
static u64 tme_activate_cpu0 = 0;
520-
521-
rdmsrl(MSR_IA32_TME_ACTIVATE, tme_activate);
522-
523-
if (mktme_status != MKTME_UNINITIALIZED) {
524-
if (tme_activate != tme_activate_cpu0) {
525-
/* Broken BIOS? */
526-
pr_err_once("x86/tme: configuration is inconsistent between CPUs\n");
527-
pr_err_once("x86/tme: MKTME is not usable\n");
528-
mktme_status = MKTME_DISABLED;
529-
530-
/* Proceed. We may need to exclude bits from x86_phys_bits. */
531-
}
532-
} else {
533-
tme_activate_cpu0 = tme_activate;
534-
}
535-
536-
if (!TME_ACTIVATE_LOCKED(tme_activate) || !TME_ACTIVATE_ENABLED(tme_activate)) {
537-
pr_info_once("x86/tme: not enabled by BIOS\n");
538-
mktme_status = MKTME_DISABLED;
539-
return;
540-
}
541-
542-
if (mktme_status != MKTME_UNINITIALIZED)
543-
goto detect_keyid_bits;
544-
545-
pr_info("x86/tme: enabled by BIOS\n");
546-
547-
tme_policy = TME_ACTIVATE_POLICY(tme_activate);
548-
if (tme_policy != TME_ACTIVATE_POLICY_AES_XTS_128)
549-
pr_warn("x86/tme: Unknown policy is active: %#llx\n", tme_policy);
550-
551-
tme_crypto_algs = TME_ACTIVATE_CRYPTO_ALGS(tme_activate);
552-
if (!(tme_crypto_algs & TME_ACTIVATE_CRYPTO_AES_XTS_128)) {
553-
pr_err("x86/mktme: No known encryption algorithm is supported: %#llx\n",
554-
tme_crypto_algs);
555-
mktme_status = MKTME_DISABLED;
556-
}
557-
detect_keyid_bits:
558-
keyid_bits = TME_ACTIVATE_KEYID_BITS(tme_activate);
559-
nr_keyids = (1UL << keyid_bits) - 1;
560-
if (nr_keyids) {
561-
pr_info_once("x86/mktme: enabled by BIOS\n");
562-
pr_info_once("x86/mktme: %d KeyIDs available\n", nr_keyids);
563-
} else {
564-
pr_info_once("x86/mktme: disabled by BIOS\n");
565-
}
566-
567-
if (mktme_status == MKTME_UNINITIALIZED) {
568-
/* MKTME is usable */
569-
mktme_status = MKTME_ENABLED;
570-
}
571-
572-
/*
573-
* KeyID bits effectively lower the number of physical address
574-
* bits. Update cpuinfo_x86::x86_phys_bits accordingly.
575-
*/
576-
c->x86_phys_bits -= keyid_bits;
577-
}
578-
579586
static void init_cpuid_fault(struct cpuinfo_x86 *c)
580587
{
581588
u64 msr;
@@ -712,9 +719,6 @@ static void init_intel(struct cpuinfo_x86 *c)
712719

713720
init_ia32_feat_ctl(c);
714721

715-
if (cpu_has(c, X86_FEATURE_TME))
716-
detect_tme(c);
717-
718722
init_intel_misc_features(c);
719723

720724
split_lock_init();

0 commit comments

Comments
 (0)