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Ryan Tayloralexdeucher
Ryan Taylor
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alexdeucher
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drm/amdgpu: replace dce_virtual with amdgpu_vkms (v3)
Move dce_virtual into amdgpu_vkms and update all references to dce_virtual with amdgpu_vkms. v2: Removed more references to dce_virtual. v3: Restored display modes from previous implementation. Signed-off-by: Ryan Taylor <Ryan.Taylor@amd.com> Reported-by: kernel test robot <lkp@intel.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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-290
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10 files changed

+228
-290
lines changed

‎drivers/gpu/drm/amd/amdgpu/Makefile‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -120,8 +120,7 @@ amdgpu-y += \
120120
amdgpu-y += \
121121
dce_v10_0.o \
122122
dce_v11_0.o \
123-
amdgpu_vkms.o \
124-
dce_virtual.o
123+
amdgpu_vkms.o
125124

126125
# add GFX block
127126
amdgpu-y += \

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c‎

Lines changed: 195 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,15 @@
55
#include <drm/drm_vblank.h>
66

77
#include "amdgpu.h"
8+
#ifdef CONFIG_DRM_AMDGPU_SI
9+
#include "dce_v6_0.h"
10+
#endif
11+
#ifdef CONFIG_DRM_AMDGPU_CIK
12+
#include "dce_v8_0.h"
13+
#endif
14+
#include "dce_v10_0.h"
15+
#include "dce_v11_0.h"
16+
#include "ivsrcid/ivsrcid_vislands30.h"
817
#include "amdgpu_vkms.h"
918
#include "amdgpu_display.h"
1019

@@ -444,3 +453,189 @@ int amdgpu_vkms_output_init(struct drm_device *dev,
444453

445454
return ret;
446455
}
456+
457+
const struct drm_mode_config_funcs amdgpu_vkms_mode_funcs = {
458+
.fb_create = amdgpu_display_user_framebuffer_create,
459+
.atomic_check = drm_atomic_helper_check,
460+
.atomic_commit = drm_atomic_helper_commit,
461+
};
462+
463+
static int amdgpu_vkms_sw_init(void *handle)
464+
{
465+
int r, i;
466+
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
467+
468+
adev_to_drm(adev)->max_vblank_count = 0;
469+
470+
adev_to_drm(adev)->mode_config.funcs = &amdgpu_vkms_mode_funcs;
471+
472+
adev_to_drm(adev)->mode_config.max_width = XRES_MAX;
473+
adev_to_drm(adev)->mode_config.max_height = YRES_MAX;
474+
475+
adev_to_drm(adev)->mode_config.preferred_depth = 24;
476+
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
477+
478+
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
479+
480+
r = amdgpu_display_modeset_create_props(adev);
481+
if (r)
482+
return r;
483+
484+
adev->amdgpu_vkms_output = kcalloc(adev->mode_info.num_crtc, sizeof(struct amdgpu_vkms_output), GFP_KERNEL);
485+
486+
/* allocate crtcs, encoders, connectors */
487+
for (i = 0; i < adev->mode_info.num_crtc; i++) {
488+
r = amdgpu_vkms_output_init(adev_to_drm(adev), &adev->amdgpu_vkms_output[i], i);
489+
if (r)
490+
return r;
491+
}
492+
493+
drm_kms_helper_poll_init(adev_to_drm(adev));
494+
495+
adev->mode_info.mode_config_initialized = true;
496+
return 0;
497+
}
498+
499+
static int amdgpu_vkms_sw_fini(void *handle)
500+
{
501+
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
502+
int i = 0;
503+
504+
for (i = 0; i < adev->mode_info.num_crtc; i++)
505+
if (adev->mode_info.crtcs[i])
506+
hrtimer_cancel(&adev->mode_info.crtcs[i]->vblank_timer);
507+
508+
kfree(adev->mode_info.bios_hardcoded_edid);
509+
kfree(adev->amdgpu_vkms_output);
510+
511+
drm_kms_helper_poll_fini(adev_to_drm(adev));
512+
513+
adev->mode_info.mode_config_initialized = false;
514+
return 0;
515+
}
516+
517+
static int amdgpu_vkms_hw_init(void *handle)
518+
{
519+
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
520+
521+
switch (adev->asic_type) {
522+
#ifdef CONFIG_DRM_AMDGPU_SI
523+
case CHIP_TAHITI:
524+
case CHIP_PITCAIRN:
525+
case CHIP_VERDE:
526+
case CHIP_OLAND:
527+
dce_v6_0_disable_dce(adev);
528+
break;
529+
#endif
530+
#ifdef CONFIG_DRM_AMDGPU_CIK
531+
case CHIP_BONAIRE:
532+
case CHIP_HAWAII:
533+
case CHIP_KAVERI:
534+
case CHIP_KABINI:
535+
case CHIP_MULLINS:
536+
dce_v8_0_disable_dce(adev);
537+
break;
538+
#endif
539+
case CHIP_FIJI:
540+
case CHIP_TONGA:
541+
dce_v10_0_disable_dce(adev);
542+
break;
543+
case CHIP_CARRIZO:
544+
case CHIP_STONEY:
545+
case CHIP_POLARIS10:
546+
case CHIP_POLARIS11:
547+
case CHIP_VEGAM:
548+
dce_v11_0_disable_dce(adev);
549+
break;
550+
case CHIP_TOPAZ:
551+
#ifdef CONFIG_DRM_AMDGPU_SI
552+
case CHIP_HAINAN:
553+
#endif
554+
/* no DCE */
555+
break;
556+
default:
557+
break;
558+
}
559+
return 0;
560+
}
561+
562+
static int amdgpu_vkms_hw_fini(void *handle)
563+
{
564+
return 0;
565+
}
566+
567+
static int amdgpu_vkms_suspend(void *handle)
568+
{
569+
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
570+
int r;
571+
572+
r = drm_mode_config_helper_suspend(adev_to_drm(adev));
573+
if (r)
574+
return r;
575+
return amdgpu_vkms_hw_fini(handle);
576+
}
577+
578+
static int amdgpu_vkms_resume(void *handle)
579+
{
580+
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
581+
int r;
582+
583+
r = amdgpu_vkms_hw_init(handle);
584+
if (r)
585+
return r;
586+
return drm_mode_config_helper_resume(adev_to_drm(adev));
587+
}
588+
589+
static bool amdgpu_vkms_is_idle(void *handle)
590+
{
591+
return true;
592+
}
593+
594+
static int amdgpu_vkms_wait_for_idle(void *handle)
595+
{
596+
return 0;
597+
}
598+
599+
static int amdgpu_vkms_soft_reset(void *handle)
600+
{
601+
return 0;
602+
}
603+
604+
static int amdgpu_vkms_set_clockgating_state(void *handle,
605+
enum amd_clockgating_state state)
606+
{
607+
return 0;
608+
}
609+
610+
static int amdgpu_vkms_set_powergating_state(void *handle,
611+
enum amd_powergating_state state)
612+
{
613+
return 0;
614+
}
615+
616+
static const struct amd_ip_funcs amdgpu_vkms_ip_funcs = {
617+
.name = "amdgpu_vkms",
618+
.early_init = NULL,
619+
.late_init = NULL,
620+
.sw_init = amdgpu_vkms_sw_init,
621+
.sw_fini = amdgpu_vkms_sw_fini,
622+
.hw_init = amdgpu_vkms_hw_init,
623+
.hw_fini = amdgpu_vkms_hw_fini,
624+
.suspend = amdgpu_vkms_suspend,
625+
.resume = amdgpu_vkms_resume,
626+
.is_idle = amdgpu_vkms_is_idle,
627+
.wait_for_idle = amdgpu_vkms_wait_for_idle,
628+
.soft_reset = amdgpu_vkms_soft_reset,
629+
.set_clockgating_state = amdgpu_vkms_set_clockgating_state,
630+
.set_powergating_state = amdgpu_vkms_set_powergating_state,
631+
};
632+
633+
const struct amdgpu_ip_block_version amdgpu_vkms_ip_block =
634+
{
635+
.type = AMD_IP_BLOCK_TYPE_DCE,
636+
.major = 1,
637+
.minor = 0,
638+
.rev = 0,
639+
.funcs = &amdgpu_vkms_ip_funcs,
640+
};
641+

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.h‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,4 @@ struct amdgpu_vkms_output {
2323
struct drm_pending_vblank_event *event;
2424
};
2525

26-
int amdgpu_vkms_output_init(struct drm_device *dev,
27-
struct amdgpu_vkms_output *output, int index);
28-
2926
#endif /* _AMDGPU_VKMS_H_ */

‎drivers/gpu/drm/amd/amdgpu/cik.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@
7070

7171
#include "amdgpu_dm.h"
7272
#include "amdgpu_amdkfd.h"
73-
#include "dce_virtual.h"
73+
#include "amdgpu_vkms.h"
7474

7575
static const struct amdgpu_video_codec_info cik_video_codecs_encode_array[] =
7676
{
@@ -2259,7 +2259,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
22592259
amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
22602260
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
22612261
if (adev->enable_virtual_display)
2262-
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
2262+
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
22632263
#if defined(CONFIG_DRM_AMD_DC)
22642264
else if (amdgpu_device_has_dc_support(adev))
22652265
amdgpu_device_ip_block_add(adev, &dm_ip_block);
@@ -2277,7 +2277,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
22772277
amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
22782278
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
22792279
if (adev->enable_virtual_display)
2280-
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
2280+
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
22812281
#if defined(CONFIG_DRM_AMD_DC)
22822282
else if (amdgpu_device_has_dc_support(adev))
22832283
amdgpu_device_ip_block_add(adev, &dm_ip_block);
@@ -2295,7 +2295,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
22952295
amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
22962296
amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
22972297
if (adev->enable_virtual_display)
2298-
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
2298+
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
22992299
#if defined(CONFIG_DRM_AMD_DC)
23002300
else if (amdgpu_device_has_dc_support(adev))
23012301
amdgpu_device_ip_block_add(adev, &dm_ip_block);
@@ -2315,7 +2315,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
23152315
amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
23162316
amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
23172317
if (adev->enable_virtual_display)
2318-
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
2318+
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
23192319
#if defined(CONFIG_DRM_AMD_DC)
23202320
else if (amdgpu_device_has_dc_support(adev))
23212321
amdgpu_device_ip_block_add(adev, &dm_ip_block);

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