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Oxalinalexdeucher
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drm/amdgpu: fix SI's GB_ADDR_CONFIG_GOLDEN values and wire up sid.h in GFX6
By wiring up sid.h in GFX6, we end up with a few duplicated defines such as the golden registers. Let's clean this up. [TAHITI,VERDE, HAINAN]_GB_ADDR_CONFIG_GOLDEN were defined both in sid.h and under si_enums.h, with different values. Keep the values used under radeon and move them under gfx_v6_0.c where they are used (as it is done under cik) Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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+13
-12
lines changed

3 files changed

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lines changed

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

Lines changed: 13 additions & 2 deletions
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@@ -28,19 +28,30 @@
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#include "amdgpu_gfx.h"
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#include "amdgpu_ucode.h"
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#include "clearstate_si.h"
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#include "si.h"
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#include "sid.h"
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#include "bif/bif_3_0_d.h"
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#include "bif/bif_3_0_sh_mask.h"
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#include "oss/oss_1_0_d.h"
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#include "oss/oss_1_0_sh_mask.h"
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#include "gca/gfx_6_0_d.h"
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#include "gca/gfx_6_0_sh_mask.h"
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#include "gca/gfx_7_2_enum.h"
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#include "gmc/gmc_6_0_d.h"
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#include "gmc/gmc_6_0_sh_mask.h"
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#include "dce/dce_6_0_d.h"
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#include "dce/dce_6_0_sh_mask.h"
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#include "gca/gfx_7_2_enum.h"
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#include "si_enums.h"
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#include "si.h"
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#define TAHITI_GB_ADDR_CONFIG_GOLDEN 0x12011003
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#define VERDE_GB_ADDR_CONFIG_GOLDEN 0x12010002
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#define HAINAN_GB_ADDR_CONFIG_GOLDEN 0x02010001
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static void gfx_v6_0_set_ring_funcs(struct amdgpu_device *adev);
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static void gfx_v6_0_set_irq_funcs(struct amdgpu_device *adev);

drivers/gpu/drm/amd/amdgpu/si_enums.h

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -128,8 +128,6 @@
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#define SI_CRTC4_REGISTER_OFFSET 0x2c00
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#define SI_CRTC5_REGISTER_OFFSET 0x2f00
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#define DMA0_REGISTER_OFFSET 0x000
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#define DMA1_REGISTER_OFFSET 0x200
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#define ES_AND_GS_AUTO 3
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#define RADEON_PACKET_TYPE3 3
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#define CE_PARTITION_BASE 3
@@ -161,10 +159,6 @@
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#define RLC_SAVE_AND_RESTORE_STARTING_OFFSET 0x90
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#define RLC_CLEAR_STATE_DESCRIPTOR_OFFSET 0x3D
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#define TAHITI_GB_ADDR_CONFIG_GOLDEN 0x12011003
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#define VERDE_GB_ADDR_CONFIG_GOLDEN 0x02010002
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#define HAINAN_GB_ADDR_CONFIG_GOLDEN 0x02011003
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#define PACKET3(op, n) ((RADEON_PACKET_TYPE3 << 30) | \
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(((op) & 0xFF) << 8) | \
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((n) & 0x3FFF) << 16)

drivers/gpu/drm/amd/amdgpu/sid.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -26,10 +26,6 @@
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#define TAHITI_RB_BITMAP_WIDTH_PER_SH 2
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#define TAHITI_GB_ADDR_CONFIG_GOLDEN 0x12011003
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#define VERDE_GB_ADDR_CONFIG_GOLDEN 0x12010002
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#define HAINAN_GB_ADDR_CONFIG_GOLDEN 0x02010001
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#define SI_MAX_SH_GPRS 256
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#define SI_MAX_TEMP_GPRS 16
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#define SI_MAX_SH_THREADS 256

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