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lucacoelholucacoelho
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iwlwifi: pcie: move some cfg mangling from trans_pcie_alloc to probe
There were a couple of special handling to find the correct cfg inside iwl_trans_pcie_alloc(). Move them to iwl_pci_probe() so they're together with the rest of the decisions. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
1 parent 91eff3f commit 809805a

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+76
-99
lines changed

2 files changed

+76
-99
lines changed

‎drivers/net/wireless/intel/iwlwifi/pcie/drv.c‎

Lines changed: 76 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,7 @@
7272

7373
#include "iwl-trans.h"
7474
#include "iwl-drv.h"
75+
#include "iwl-prph.h"
7576
#include "internal.h"
7677

7778
#define IWL_PCI_DEVICE(dev, subdev, cfg) \
@@ -1017,29 +1018,70 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10171018
else if (cfg == &iwl7265_n_cfg)
10181019
cfg_7265d = &iwl7265d_n_cfg;
10191020
if (cfg_7265d &&
1020-
(iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D) {
1021+
(iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D)
10211022
cfg = cfg_7265d;
1022-
iwl_trans->cfg = cfg_7265d;
1023-
}
10241023

1025-
if (iwl_trans->cfg->trans.rf_id && cfg == &iwl22000_2ac_cfg_hr_cdb &&
1026-
iwl_trans->hw_rev != CSR_HW_REV_TYPE_HR_CDB) {
1027-
u32 rf_id_chp = CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id);
1028-
u32 jf_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF);
1029-
u32 hr_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR);
1030-
1031-
if (rf_id_chp == jf_chp_id) {
1032-
if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
1033-
cfg = &iwl9560_2ac_cfg_qnj_jf_b0;
1034-
else
1035-
cfg = &iwl22000_2ac_cfg_jf;
1036-
} else if (rf_id_chp == hr_chp_id) {
1037-
if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
1038-
cfg = &iwl22000_2ax_cfg_qnj_hr_a0;
1039-
else
1040-
cfg = &iwl22000_2ac_cfg_hr;
1024+
iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
1025+
1026+
if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
1027+
if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_TY) {
1028+
cfg = &iwlax210_2ax_cfg_ty_gf_a0;
1029+
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1030+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
1031+
cfg = &iwlax210_2ax_cfg_so_jf_a0;
1032+
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1033+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF)) {
1034+
cfg = &iwlax211_2ax_cfg_so_gf_a0;
1035+
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1036+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF4)) {
1037+
cfg = &iwlax411_2ax_cfg_so_gf4_a0;
1038+
}
1039+
} else if (cfg == &iwl_ax101_cfg_qu_hr) {
1040+
if ((CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1041+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
1042+
iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) ||
1043+
(CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1044+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR1))) {
1045+
cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
1046+
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1047+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR)) {
1048+
cfg = &iwl_ax101_cfg_qu_hr;
1049+
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1050+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
1051+
cfg = &iwl22000_2ax_cfg_jf;
1052+
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1053+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HRCDB)) {
1054+
IWL_ERR(iwl_trans, "RF ID HRCDB is not supported\n");
1055+
return -EINVAL;
1056+
} else {
1057+
IWL_ERR(iwl_trans, "Unrecognized RF ID 0x%08x\n",
1058+
CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id));
1059+
return -EINVAL;
1060+
}
1061+
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1062+
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
1063+
((cfg != &iwl_ax200_cfg_cc &&
1064+
cfg != &killer1650x_2ax_cfg &&
1065+
cfg != &killer1650w_2ax_cfg &&
1066+
cfg != &iwl_ax201_cfg_quz_hr) ||
1067+
iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0)) {
1068+
u32 hw_status;
1069+
1070+
hw_status = iwl_read_prph(iwl_trans, UMAG_GEN_HW_STATUS);
1071+
if (CSR_HW_RF_STEP(iwl_trans->hw_rf_id) == SILICON_B_STEP)
1072+
/*
1073+
* b step fw is the same for physical card and fpga
1074+
*/
1075+
cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
1076+
else if ((hw_status & UMAG_GEN_HW_IS_FPGA) &&
1077+
CSR_HW_RF_STEP(iwl_trans->hw_rf_id) == SILICON_A_STEP) {
1078+
cfg = &iwl22000_2ax_cfg_qnj_hr_a0_f0;
1079+
} else {
1080+
/*
1081+
* a step no FPGA
1082+
*/
1083+
cfg = &iwl22000_2ac_cfg_hr;
10411084
}
1042-
iwl_trans->cfg = cfg;
10431085
}
10441086

10451087
/*
@@ -1049,22 +1091,18 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10491091
* thing to do to support Qu C-step.
10501092
*/
10511093
if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QU_C0) {
1052-
if (iwl_trans->cfg == &iwl_ax101_cfg_qu_hr)
1053-
iwl_trans->cfg = &iwl_ax101_cfg_qu_c0_hr_b0;
1054-
else if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
1055-
iwl_trans->cfg = &iwl_ax201_cfg_qu_c0_hr_b0;
1056-
else if (iwl_trans->cfg == &iwl9461_2ac_cfg_qu_b0_jf_b0)
1057-
iwl_trans->cfg = &iwl9461_2ac_cfg_qu_c0_jf_b0;
1058-
else if (iwl_trans->cfg == &iwl9462_2ac_cfg_qu_b0_jf_b0)
1059-
iwl_trans->cfg = &iwl9462_2ac_cfg_qu_c0_jf_b0;
1060-
else if (iwl_trans->cfg == &iwl9560_2ac_cfg_qu_b0_jf_b0)
1061-
iwl_trans->cfg = &iwl9560_2ac_cfg_qu_c0_jf_b0;
1062-
else if (iwl_trans->cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
1063-
iwl_trans->cfg = &iwl9560_2ac_160_cfg_qu_c0_jf_b0;
1064-
else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_b0_hr_b0)
1065-
iwl_trans->cfg = &killer1650s_2ax_cfg_qu_c0_hr_b0;
1066-
else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_b0_hr_b0)
1067-
iwl_trans->cfg = &killer1650i_2ax_cfg_qu_c0_hr_b0;
1094+
if (cfg == &iwl_ax101_cfg_qu_hr)
1095+
cfg = &iwl_ax101_cfg_qu_c0_hr_b0;
1096+
else if (cfg == &iwl_ax201_cfg_qu_hr)
1097+
cfg = &iwl_ax201_cfg_qu_c0_hr_b0;
1098+
else if (cfg == &iwl9461_2ac_cfg_qu_b0_jf_b0)
1099+
cfg = &iwl9461_2ac_cfg_qu_c0_jf_b0;
1100+
else if (cfg == &iwl9462_2ac_cfg_qu_b0_jf_b0)
1101+
cfg = &iwl9462_2ac_cfg_qu_c0_jf_b0;
1102+
else if (cfg == &iwl9560_2ac_cfg_qu_b0_jf_b0)
1103+
cfg = &iwl9560_2ac_cfg_qu_c0_jf_b0;
1104+
else if (cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
1105+
cfg = &iwl9560_2ac_160_cfg_qu_c0_jf_b0;
10681106
}
10691107

10701108
/* same thing for QuZ... */
@@ -1084,6 +1122,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10841122
}
10851123

10861124
#endif
1125+
/* now set the real cfg we decided to use */
1126+
iwl_trans->cfg = cfg;
10871127

10881128
pci_set_drvdata(pdev, iwl_trans);
10891129
iwl_trans->drv = iwl_drv_start(iwl_trans);

‎drivers/net/wireless/intel/iwlwifi/pcie/trans.c‎

Lines changed: 0 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -3521,69 +3521,6 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
35213521

35223522
IWL_DEBUG_INFO(trans, "HW REV: 0x%0x\n", trans->hw_rev);
35233523

3524-
#if IS_ENABLED(CONFIG_IWLMVM)
3525-
trans->hw_rf_id = iwl_read32(trans, CSR_HW_RF_ID);
3526-
3527-
if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
3528-
if (trans->hw_rev == CSR_HW_REV_TYPE_TY) {
3529-
trans->cfg = &iwlax210_2ax_cfg_ty_gf_a0;
3530-
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3531-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
3532-
trans->cfg = &iwlax210_2ax_cfg_so_jf_a0;
3533-
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3534-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF)) {
3535-
trans->cfg = &iwlax211_2ax_cfg_so_gf_a0;
3536-
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3537-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF4)) {
3538-
trans->cfg = &iwlax411_2ax_cfg_so_gf4_a0;
3539-
}
3540-
} else if (cfg == &iwl_ax101_cfg_qu_hr) {
3541-
if ((CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3542-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
3543-
trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) ||
3544-
(CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3545-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR1))) {
3546-
trans->cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
3547-
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3548-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR)) {
3549-
trans->cfg = &iwl_ax101_cfg_qu_hr;
3550-
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3551-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
3552-
trans->cfg = &iwl22000_2ax_cfg_jf;
3553-
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3554-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HRCDB)) {
3555-
IWL_ERR(trans, "RF ID HRCDB is not supported\n");
3556-
ret = -EINVAL;
3557-
goto out_no_pci;
3558-
} else {
3559-
IWL_ERR(trans, "Unrecognized RF ID 0x%08x\n",
3560-
CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id));
3561-
ret = -EINVAL;
3562-
goto out_no_pci;
3563-
}
3564-
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
3565-
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
3566-
trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) {
3567-
u32 hw_status;
3568-
3569-
hw_status = iwl_read_prph(trans, UMAG_GEN_HW_STATUS);
3570-
if (CSR_HW_RF_STEP(trans->hw_rf_id) == SILICON_B_STEP)
3571-
/*
3572-
* b step fw is the same for physical card and fpga
3573-
*/
3574-
trans->cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
3575-
else if ((hw_status & UMAG_GEN_HW_IS_FPGA) &&
3576-
CSR_HW_RF_STEP(trans->hw_rf_id) == SILICON_A_STEP) {
3577-
trans->cfg = &iwl22000_2ax_cfg_qnj_hr_a0_f0;
3578-
} else {
3579-
/*
3580-
* a step no FPGA
3581-
*/
3582-
trans->cfg = &iwl22000_2ac_cfg_hr;
3583-
}
3584-
}
3585-
#endif
3586-
35873524
iwl_pcie_set_interrupt_capa(pdev, trans);
35883525
trans->hw_id = (pdev->device << 16) + pdev->subsystem_device;
35893526
snprintf(trans->hw_id_str, sizeof(trans->hw_id_str),

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