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Matt Carlsondavem330
Matt Carlson
authored and
davem330
committed
tg3: Add 5719 ASIC rev
This patch adds the 5719 ASIC revision. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
1 parent 9c7df91 commit a50d079

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2 files changed

+52
-18
lines changed

2 files changed

+52
-18
lines changed

‎drivers/net/tg3.c‎

Lines changed: 50 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1084,7 +1084,8 @@ static int tg3_mdio_init(struct tg3 *tp)
10841084
u32 reg;
10851085
struct phy_device *phydev;
10861086

1087-
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
1087+
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
1088+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
10881089
u32 is_serdes;
10891090

10901091
tp->phy_addr = PCI_FUNC(tp->pdev->devfn) + 1;
@@ -1600,7 +1601,8 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
16001601
u32 reg;
16011602

16021603
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
1603-
(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
1604+
((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
1605+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) &&
16041606
(tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
16051607
return;
16061608

@@ -1975,7 +1977,8 @@ static int tg3_phy_reset(struct tg3 *tp)
19751977
}
19761978
}
19771979

1978-
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
1980+
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
1981+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) &&
19791982
(tp->tg3_flags2 & TG3_FLG2_MII_SERDES))
19801983
return 0;
19811984

@@ -2060,6 +2063,7 @@ static void tg3_frob_aux_power(struct tg3 *tp)
20602063

20612064
/* The GPIOs do something completely different on 57765. */
20622065
if ((tp->tg3_flags2 & TG3_FLG2_IS_NIC) == 0 ||
2066+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
20632067
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
20642068
return;
20652069

@@ -7083,6 +7087,7 @@ static int tg3_chip_reset(struct tg3 *tp)
70837087
tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 &&
70847088
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
70857089
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
7090+
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
70867091
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
70877092
val = tr32(0x7c00);
70887093

@@ -7518,7 +7523,8 @@ static void tg3_rings_reset(struct tg3 *tp)
75187523

75197524

75207525
/* Disable all receive return rings but the first. */
7521-
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
7526+
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
7527+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
75227528
limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
75237529
else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
75247530
limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
@@ -7756,6 +7762,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
77567762
return err;
77577763

77587764
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
7765+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
77597766
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
77607767
val = tr32(TG3PCI_DMA_RW_CTRL) &
77617768
~DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
@@ -7884,7 +7891,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
78847891
((u64) tpr->rx_std_mapping >> 32));
78857892
tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
78867893
((u64) tpr->rx_std_mapping & 0xffffffff));
7887-
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717)
7894+
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
7895+
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719)
78887896
tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR,
78897897
NIC_SRAM_RX_BUFFER_DESC);
78907898

@@ -7909,7 +7917,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
79097917
tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_MAXLEN_FLAGS,
79107918
(RX_JUMBO_MAX_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT) |
79117919
BDINFO_FLAGS_USE_EXT_RECV);
7912-
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717)
7920+
if (!(tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) ||
7921+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
79137922
tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_NIC_ADDR,
79147923
NIC_SRAM_RX_JUMBO_BUFFER_DESC);
79157924
} else {
@@ -7918,6 +7927,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
79187927
}
79197928

79207929
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
7930+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
79217931
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
79227932
val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) |
79237933
(TG3_RX_STD_DMA_SZ << 2);
@@ -7936,6 +7946,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
79367946
tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx);
79377947

79387948
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
7949+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
79397950
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
79407951
tw32(STD_REPLENISH_LWM, 32);
79417952
tw32(JMB_REPLENISH_LWM, 16);
@@ -7971,7 +7982,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
79717982
RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB |
79727983
RDMAC_MODE_LNGREAD_ENAB);
79737984

7974-
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
7985+
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
7986+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
79757987
rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS;
79767988

79777989
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
@@ -8626,6 +8638,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
86268638
* observable way to know whether the interrupt was delivered.
86278639
*/
86288640
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
8641+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
86298642
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
86308643
(tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
86318644
val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE;
@@ -8670,6 +8683,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
86708683
if (intr_ok) {
86718684
/* Reenable MSI one shot mode. */
86728685
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
8686+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
86738687
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
86748688
(tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
86758689
val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE;
@@ -8812,7 +8826,8 @@ static bool tg3_enable_msix(struct tg3 *tp)
88128826
if (tp->irq_cnt > 1) {
88138827
tp->tg3_flags3 |= TG3_FLG3_ENABLE_RSS;
88148828

8815-
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
8829+
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
8830+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
88168831
tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS;
88178832
tp->dev->real_num_tx_queues = tp->irq_cnt - 1;
88188833
}
@@ -8965,6 +8980,7 @@ static int tg3_open(struct net_device *dev)
89658980
}
89668981

89678982
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
8983+
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
89688984
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 &&
89698985
(tp->tg3_flags2 & TG3_FLG2_USING_MSI) &&
89708986
(tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) {
@@ -10576,7 +10592,8 @@ static int tg3_test_memory(struct tg3 *tp)
1057610592
int err = 0;
1057710593
int i;
1057810594

10579-
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
10595+
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
10596+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
1058010597
mem_tbl = mem_tbl_5717;
1058110598
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
1058210599
mem_tbl = mem_tbl_57765;
@@ -11656,7 +11673,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
1165611673
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
1165711674
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
1165811675
tg3_get_57780_nvram_info(tp);
11659-
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
11676+
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
11677+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
1166011678
tg3_get_5717_nvram_info(tp);
1166111679
else
1166211680
tg3_get_nvram_info(tp);
@@ -12092,11 +12110,10 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
1209212110

1209312111
tp->phy_id = eeprom_phy_id;
1209412112
if (eeprom_phy_serdes) {
12095-
if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) ||
12096-
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
12097-
tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
12098-
else
12113+
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
1209912114
tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
12115+
else
12116+
tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
1210012117
}
1210112118

1210212119
if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
@@ -12826,7 +12843,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
1282612843

1282712844
if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 ||
1282812845
tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 ||
12829-
tp->pdev->device == TG3PCI_DEVICE_TIGON3_5724)
12846+
tp->pdev->device == TG3PCI_DEVICE_TIGON3_5724 ||
12847+
tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719)
1283012848
pci_read_config_dword(tp->pdev,
1283112849
TG3PCI_GEN2_PRODID_ASICREV,
1283212850
&prod_id_asic_rev);
@@ -12992,6 +13010,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
1299213010
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
1299313011
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
1299413012
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13013+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1299513014
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
1299613015
tp->tg3_flags3 |= TG3_FLG3_5755_PLUS;
1299713016

@@ -13021,6 +13040,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
1302113040

1302213041
/* Determine TSO capabilities */
1302313042
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13043+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1302413044
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
1302513045
tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3;
1302613046
else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
@@ -13058,13 +13078,15 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
1305813078
}
1305913079

1306013080
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13081+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1306113082
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
1306213083
tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX;
1306313084
tp->irq_max = TG3_IRQ_MAX_VECS;
1306413085
}
1306513086
}
1306613087

1306713088
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13089+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1306813090
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
1306913091
tp->tg3_flags3 |= TG3_FLG3_SHORT_DMA_BUG;
1307013092
else if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) {
@@ -13073,6 +13095,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
1307313095
}
1307413096

1307513097
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13098+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1307613099
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
1307713100
tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG;
1307813101

@@ -13275,6 +13298,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
1327513298
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
1327613299
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
1327713300
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13301+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1327813302
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
1327913303
tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT;
1328013304

@@ -13355,6 +13379,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
1335513379
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
1335613380
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 &&
1335713381
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
13382+
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
1335813383
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
1335913384
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
1336013385
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
@@ -13603,9 +13628,12 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
1360313628
tw32_f(NVRAM_CMD, NVRAM_CMD_RESET);
1360413629
else
1360513630
tg3_nvram_unlock(tp);
13606-
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
13607-
if (PCI_FUNC(tp->pdev->devfn))
13631+
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13632+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
13633+
if (PCI_FUNC(tp->pdev->devfn) & 1)
1360813634
mac_offset = 0xcc;
13635+
if (PCI_FUNC(tp->pdev->devfn) > 1)
13636+
mac_offset += 0x18c;
1360913637
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
1361013638
mac_offset = 0x10;
1361113639

@@ -13691,6 +13719,7 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val)
1369113719
#endif
1369213720

1369313721
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13722+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1369413723
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
1369513724
val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
1369613725
goto out;
@@ -13903,6 +13932,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
1390313932
tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl);
1390413933

1390513934
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13935+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1390613936
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
1390713937
goto out;
1390813938

@@ -14102,6 +14132,7 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
1410214132
static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
1410314133
{
1410414134
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
14135+
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
1410514136
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
1410614137
tp->bufmgr_config.mbuf_read_dma_low_water =
1410714138
DEFAULT_MB_RDMA_LOW_WATER_5705;
@@ -14427,7 +14458,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
1442714458
}
1442814459

1442914460
if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) &&
14430-
tp->pci_chip_rev_id != CHIPREV_ID_5717_A0)
14461+
tp->pci_chip_rev_id != CHIPREV_ID_5717_A0 &&
14462+
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719)
1443114463
dev->netdev_ops = &tg3_netdev_ops;
1443214464
else
1443314465
dev->netdev_ops = &tg3_netdev_ops_dma_bug;

‎drivers/net/tg3.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@
5353
#define TG3PCI_DEVICE_TIGON3_57765 0x16b4
5454
#define TG3PCI_DEVICE_TIGON3_57791 0x16b2
5555
#define TG3PCI_DEVICE_TIGON3_57795 0x16b6
56+
#define TG3PCI_DEVICE_TIGON3_5719 0x1657
5657
/* 0x04 --> 0x2c unused */
5758
#define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM
5859
#define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644
@@ -160,6 +161,7 @@
160161
#define ASIC_REV_57780 0x57780
161162
#define ASIC_REV_5717 0x5717
162163
#define ASIC_REV_57765 0x57785
164+
#define ASIC_REV_5719 0x5719
163165
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
164166
#define CHIPREV_5700_AX 0x70
165167
#define CHIPREV_5700_BX 0x71

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