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Tariq ToukanSaeed Mahameed
Tariq Toukan
authored and
Saeed Mahameed
committed
net/mlx5: Move TISes from priv to mdev HW resources
The transport interface send (TIS) object is responsible for performing all transport related operations of the transmit side. Messages from Send Queues get segmented and transmitted by the TIS including all transport required implications, e.g. in the case of large send offload, the TIS is responsible for the segmentation. These are stateless objects and can be used by multiple netdevs (e.g. representors) who share the same core device. Providing the TISes as a service from the core layer to the netdev layer reduces the number of replecated TIS objects (in case of multiple netdevs), and will ease the transition to netdev with multiple mdevs. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Gal Pressman <gal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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11 files changed

+140
-110
lines changed

11 files changed

+140
-110
lines changed

‎drivers/net/ethernet/mellanox/mlx5/core/en.h‎

Lines changed: 11 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,6 @@ struct page_pool;
7272
#define MLX5E_HW2SW_MTU(params, hwmtu) ((hwmtu) - ((params)->hard_mtu))
7373
#define MLX5E_SW2HW_MTU(params, swmtu) ((swmtu) + ((params)->hard_mtu))
7474

75-
#define MLX5E_MAX_NUM_TC 8
7675
#define MLX5E_MAX_NUM_MQPRIO_CH_TC TC_QOPT_MAX_QUEUE
7776

7877
#define MLX5_RX_HEADROOM NET_SKB_PAD
@@ -758,7 +757,7 @@ struct mlx5e_channel {
758757
/* data path */
759758
struct mlx5e_rq rq;
760759
struct mlx5e_xdpsq rq_xdpsq;
761-
struct mlx5e_txqsq sq[MLX5E_MAX_NUM_TC];
760+
struct mlx5e_txqsq sq[MLX5_MAX_NUM_TC];
762761
struct mlx5e_icosq icosq; /* internal control operations */
763762
struct mlx5e_txqsq __rcu * __rcu *qos_sqs;
764763
bool xdp;
@@ -808,7 +807,7 @@ struct mlx5e_channels {
808807

809808
struct mlx5e_channel_stats {
810809
struct mlx5e_ch_stats ch;
811-
struct mlx5e_sq_stats sq[MLX5E_MAX_NUM_TC];
810+
struct mlx5e_sq_stats sq[MLX5_MAX_NUM_TC];
812811
struct mlx5e_rq_stats rq;
813812
struct mlx5e_rq_stats xskrq;
814813
struct mlx5e_xdpsq_stats rq_xdpsq;
@@ -818,8 +817,8 @@ struct mlx5e_channel_stats {
818817

819818
struct mlx5e_ptp_stats {
820819
struct mlx5e_ch_stats ch;
821-
struct mlx5e_sq_stats sq[MLX5E_MAX_NUM_TC];
822-
struct mlx5e_ptp_cq_stats cq[MLX5E_MAX_NUM_TC];
820+
struct mlx5e_sq_stats sq[MLX5_MAX_NUM_TC];
821+
struct mlx5e_ptp_cq_stats cq[MLX5_MAX_NUM_TC];
823822
struct mlx5e_rq_stats rq;
824823
} ____cacheline_aligned_in_smp;
825824

@@ -886,7 +885,6 @@ struct mlx5e_priv {
886885
struct mlx5e_rq drop_rq;
887886

888887
struct mlx5e_channels channels;
889-
u32 tisn[MLX5_MAX_PORTS][MLX5E_MAX_NUM_TC];
890888
struct mlx5e_rx_res *rx_res;
891889
u32 *tx_rates;
892890

@@ -984,13 +982,20 @@ struct mlx5e_profile {
984982
void (*update_stats)(struct mlx5e_priv *priv);
985983
void (*update_carrier)(struct mlx5e_priv *priv);
986984
int (*max_nch_limit)(struct mlx5_core_dev *mdev);
985+
u32 (*get_tisn)(struct mlx5_core_dev *mdev, struct mlx5e_priv *priv,
986+
u8 lag_port, u8 tc);
987987
unsigned int (*stats_grps_num)(struct mlx5e_priv *priv);
988988
mlx5e_stats_grp_t *stats_grps;
989989
const struct mlx5e_rx_handlers *rx_handlers;
990990
int max_tc;
991991
u32 features;
992992
};
993993

994+
u32 mlx5e_profile_get_tisn(struct mlx5_core_dev *mdev,
995+
struct mlx5e_priv *priv,
996+
const struct mlx5e_profile *profile,
997+
u8 lag_port, u8 tc);
998+
994999
#define mlx5e_profile_feature_cap(profile, feature) \
9951000
((profile)->features & BIT(MLX5E_PROFILE_FEATURE_##feature))
9961001

@@ -1132,8 +1137,6 @@ void mlx5e_close_drop_rq(struct mlx5e_rq *drop_rq);
11321137
int mlx5e_create_tis(struct mlx5_core_dev *mdev, void *in, u32 *tisn);
11331138
void mlx5e_destroy_tis(struct mlx5_core_dev *mdev, u32 tisn);
11341139

1135-
int mlx5e_create_tises(struct mlx5e_priv *priv);
1136-
void mlx5e_destroy_tises(struct mlx5e_priv *priv);
11371140
int mlx5e_update_nic_rx(struct mlx5e_priv *priv);
11381141
void mlx5e_update_carrier(struct mlx5e_priv *priv);
11391142
int mlx5e_close(struct net_device *netdev);

‎drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -518,9 +518,11 @@ static int mlx5e_ptp_open_txqsqs(struct mlx5e_ptp *c,
518518

519519
for (tc = 0; tc < num_tc; tc++) {
520520
int txq_ix = ix_base + tc;
521+
u32 tisn;
521522

522-
err = mlx5e_ptp_open_txqsq(c, c->priv->tisn[c->lag_port][tc], txq_ix,
523-
cparams, tc, &c->ptpsq[tc]);
523+
tisn = mlx5e_profile_get_tisn(c->mdev, c->priv, c->priv->profile,
524+
c->lag_port, tc);
525+
err = mlx5e_ptp_open_txqsq(c, tisn, txq_ix, cparams, tc, &c->ptpsq[tc]);
524526
if (err)
525527
goto close_txqsq;
526528
}

‎drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ enum {
4949

5050
struct mlx5e_ptp {
5151
/* data path */
52-
struct mlx5e_ptpsq ptpsq[MLX5E_MAX_NUM_TC];
52+
struct mlx5e_ptpsq ptpsq[MLX5_MAX_NUM_TC];
5353
struct mlx5e_rq rq;
5454
struct napi_struct napi;
5555
struct device *pdev;

‎drivers/net/ethernet/mellanox/mlx5/core/en/qos.c‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,7 @@ int mlx5e_open_qos_sq(struct mlx5e_priv *priv, struct mlx5e_channels *chs,
7777
struct mlx5e_params *params;
7878
struct mlx5e_channel *c;
7979
struct mlx5e_txqsq *sq;
80+
u32 tisn;
8081

8182
params = &chs->params;
8283

@@ -126,8 +127,10 @@ int mlx5e_open_qos_sq(struct mlx5e_priv *priv, struct mlx5e_channels *chs,
126127
err = mlx5e_open_cq(priv, params->tx_cq_moderation, &param_cq, &ccp, &sq->cq);
127128
if (err)
128129
goto err_free_sq;
129-
err = mlx5e_open_txqsq(c, priv->tisn[c->lag_port][0], txq_ix, params,
130-
&param_sq, sq, 0, hw_id,
130+
131+
tisn = mlx5e_profile_get_tisn(c->mdev, c->priv, c->priv->profile,
132+
c->lag_port, 0);
133+
err = mlx5e_open_txqsq(c, tisn, txq_ix, params, &param_sq, sq, 0, hw_id,
131134
priv->htb_qos_sq_stats[node_qid]);
132135
if (err)
133136
goto err_close_cq;

‎drivers/net/ethernet/mellanox/mlx5/core/en_common.c‎

Lines changed: 74 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,72 @@ int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn, u32 *mkey)
7474
return err;
7575
}
7676

77+
int mlx5e_create_tis(struct mlx5_core_dev *mdev, void *in, u32 *tisn)
78+
{
79+
void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);
80+
81+
MLX5_SET(tisc, tisc, transport_domain, mdev->mlx5e_res.hw_objs.td.tdn);
82+
83+
if (mlx5_lag_is_lacp_owner(mdev))
84+
MLX5_SET(tisc, tisc, strict_lag_tx_port_affinity, 1);
85+
86+
return mlx5_core_create_tis(mdev, in, tisn);
87+
}
88+
89+
void mlx5e_destroy_tis(struct mlx5_core_dev *mdev, u32 tisn)
90+
{
91+
mlx5_core_destroy_tis(mdev, tisn);
92+
}
93+
94+
static void mlx5e_destroy_tises(struct mlx5_core_dev *mdev, u32 tisn[MLX5_MAX_PORTS][MLX5_MAX_NUM_TC])
95+
{
96+
int tc, i;
97+
98+
for (i = 0; i < MLX5_MAX_PORTS; i++)
99+
for (tc = 0; tc < MLX5_MAX_NUM_TC; tc++)
100+
mlx5e_destroy_tis(mdev, tisn[i][tc]);
101+
}
102+
103+
static bool mlx5_lag_should_assign_affinity(struct mlx5_core_dev *mdev)
104+
{
105+
return MLX5_CAP_GEN(mdev, lag_tx_port_affinity) && mlx5e_get_num_lag_ports(mdev) > 1;
106+
}
107+
108+
static int mlx5e_create_tises(struct mlx5_core_dev *mdev, u32 tisn[MLX5_MAX_PORTS][MLX5_MAX_NUM_TC])
109+
{
110+
int tc, i;
111+
int err;
112+
113+
for (i = 0; i < MLX5_MAX_PORTS; i++) {
114+
for (tc = 0; tc < MLX5_MAX_NUM_TC; tc++) {
115+
u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {};
116+
void *tisc;
117+
118+
tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);
119+
120+
MLX5_SET(tisc, tisc, prio, tc << 1);
121+
122+
if (mlx5_lag_should_assign_affinity(mdev))
123+
MLX5_SET(tisc, tisc, lag_tx_port_affinity, i + 1);
124+
125+
err = mlx5e_create_tis(mdev, in, &tisn[i][tc]);
126+
if (err)
127+
goto err_close_tises;
128+
}
129+
}
130+
131+
return 0;
132+
133+
err_close_tises:
134+
for (; i >= 0; i--) {
135+
for (tc--; tc >= 0; tc--)
136+
mlx5e_destroy_tis(mdev, tisn[i][tc]);
137+
tc = MLX5_MAX_NUM_TC;
138+
}
139+
140+
return err;
141+
}
142+
77143
int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev)
78144
{
79145
struct mlx5e_hw_objs *res = &mdev->mlx5e_res.hw_objs;
@@ -103,6 +169,11 @@ int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev)
103169
goto err_destroy_mkey;
104170
}
105171

172+
err = mlx5e_create_tises(mdev, res->tisn);
173+
if (err) {
174+
mlx5_core_err(mdev, "alloc tises failed, %d\n", err);
175+
goto err_destroy_bfreg;
176+
}
106177
INIT_LIST_HEAD(&res->td.tirs_list);
107178
mutex_init(&res->td.list_lock);
108179

@@ -115,6 +186,8 @@ int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev)
115186

116187
return 0;
117188

189+
err_destroy_bfreg:
190+
mlx5_free_bfreg(mdev, &res->bfreg);
118191
err_destroy_mkey:
119192
mlx5_core_destroy_mkey(mdev, res->mkey);
120193
err_dealloc_transport_domain:
@@ -130,6 +203,7 @@ void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev)
130203

131204
mlx5_crypto_dek_cleanup(mdev->mlx5e_res.dek_priv);
132205
mdev->mlx5e_res.dek_priv = NULL;
206+
mlx5e_destroy_tises(mdev, res->tisn);
133207
mlx5_free_bfreg(mdev, &res->bfreg);
134208
mlx5_core_destroy_mkey(mdev, res->mkey);
135209
mlx5_core_dealloc_transport_domain(mdev, res->td.tdn);

‎drivers/net/ethernet/mellanox/mlx5/core/en_main.c‎

Lines changed: 20 additions & 82 deletions
Original file line numberDiff line numberDiff line change
@@ -1352,6 +1352,17 @@ void mlx5e_close_rq(struct mlx5e_rq *rq)
13521352
mlx5e_free_rq(rq);
13531353
}
13541354

1355+
u32 mlx5e_profile_get_tisn(struct mlx5_core_dev *mdev,
1356+
struct mlx5e_priv *priv,
1357+
const struct mlx5e_profile *profile,
1358+
u8 lag_port, u8 tc)
1359+
{
1360+
if (profile->get_tisn)
1361+
return profile->get_tisn(mdev, priv, lag_port, tc);
1362+
1363+
return mdev->mlx5e_res.hw_objs.tisn[lag_port][tc];
1364+
}
1365+
13551366
static void mlx5e_free_xdpsq_db(struct mlx5e_xdpsq *sq)
13561367
{
13571368
kvfree(sq->db.xdpi_fifo.xi);
@@ -1920,7 +1931,8 @@ int mlx5e_open_xdpsq(struct mlx5e_channel *c, struct mlx5e_params *params,
19201931
return err;
19211932

19221933
csp.tis_lst_sz = 1;
1923-
csp.tisn = c->priv->tisn[c->lag_port][0]; /* tc = 0 */
1934+
csp.tisn = mlx5e_profile_get_tisn(c->mdev, c->priv, c->priv->profile,
1935+
c->lag_port, 0); /* tc = 0 */
19241936
csp.cqn = sq->cq.mcq.cqn;
19251937
csp.wq_ctrl = &sq->wq_ctrl;
19261938
csp.min_inline_mode = sq->min_inline_mode;
@@ -2204,12 +2216,15 @@ static int mlx5e_open_sqs(struct mlx5e_channel *c,
22042216
for (tc = 0; tc < mlx5e_get_dcb_num_tc(params); tc++) {
22052217
int txq_ix = c->ix + tc * params->num_channels;
22062218
u32 qos_queue_group_id;
2219+
u32 tisn;
22072220

2221+
tisn = mlx5e_profile_get_tisn(c->mdev, c->priv, c->priv->profile,
2222+
c->lag_port, tc);
22082223
err = mlx5e_txq_get_qos_node_hw_id(params, txq_ix, &qos_queue_group_id);
22092224
if (err)
22102225
goto err_close_sqs;
22112226

2212-
err = mlx5e_open_txqsq(c, c->priv->tisn[c->lag_port][tc], txq_ix,
2227+
err = mlx5e_open_txqsq(c, tisn, txq_ix,
22132228
params, &cparam->txq_sq, &c->sq[tc], tc,
22142229
qos_queue_group_id,
22152230
&c->priv->channel_stats[c->ix]->sq[tc]);
@@ -3351,72 +3366,6 @@ void mlx5e_close_drop_rq(struct mlx5e_rq *drop_rq)
33513366
mlx5e_free_cq(&drop_rq->cq);
33523367
}
33533368

3354-
int mlx5e_create_tis(struct mlx5_core_dev *mdev, void *in, u32 *tisn)
3355-
{
3356-
void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);
3357-
3358-
MLX5_SET(tisc, tisc, transport_domain, mdev->mlx5e_res.hw_objs.td.tdn);
3359-
3360-
if (mlx5_lag_is_lacp_owner(mdev))
3361-
MLX5_SET(tisc, tisc, strict_lag_tx_port_affinity, 1);
3362-
3363-
return mlx5_core_create_tis(mdev, in, tisn);
3364-
}
3365-
3366-
void mlx5e_destroy_tis(struct mlx5_core_dev *mdev, u32 tisn)
3367-
{
3368-
mlx5_core_destroy_tis(mdev, tisn);
3369-
}
3370-
3371-
void mlx5e_destroy_tises(struct mlx5e_priv *priv)
3372-
{
3373-
int tc, i;
3374-
3375-
for (i = 0; i < mlx5e_get_num_lag_ports(priv->mdev); i++)
3376-
for (tc = 0; tc < priv->profile->max_tc; tc++)
3377-
mlx5e_destroy_tis(priv->mdev, priv->tisn[i][tc]);
3378-
}
3379-
3380-
static bool mlx5e_lag_should_assign_affinity(struct mlx5_core_dev *mdev)
3381-
{
3382-
return MLX5_CAP_GEN(mdev, lag_tx_port_affinity) && mlx5e_get_num_lag_ports(mdev) > 1;
3383-
}
3384-
3385-
int mlx5e_create_tises(struct mlx5e_priv *priv)
3386-
{
3387-
int tc, i;
3388-
int err;
3389-
3390-
for (i = 0; i < mlx5e_get_num_lag_ports(priv->mdev); i++) {
3391-
for (tc = 0; tc < priv->profile->max_tc; tc++) {
3392-
u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {};
3393-
void *tisc;
3394-
3395-
tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);
3396-
3397-
MLX5_SET(tisc, tisc, prio, tc << 1);
3398-
3399-
if (mlx5e_lag_should_assign_affinity(priv->mdev))
3400-
MLX5_SET(tisc, tisc, lag_tx_port_affinity, i + 1);
3401-
3402-
err = mlx5e_create_tis(priv->mdev, in, &priv->tisn[i][tc]);
3403-
if (err)
3404-
goto err_close_tises;
3405-
}
3406-
}
3407-
3408-
return 0;
3409-
3410-
err_close_tises:
3411-
for (; i >= 0; i--) {
3412-
for (tc--; tc >= 0; tc--)
3413-
mlx5e_destroy_tis(priv->mdev, priv->tisn[i][tc]);
3414-
tc = priv->profile->max_tc;
3415-
}
3416-
3417-
return err;
3418-
}
3419-
34203369
static void mlx5e_cleanup_nic_tx(struct mlx5e_priv *priv)
34213370
{
34223371
if (priv->mqprio_rl) {
@@ -3425,7 +3374,6 @@ static void mlx5e_cleanup_nic_tx(struct mlx5e_priv *priv)
34253374
priv->mqprio_rl = NULL;
34263375
}
34273376
mlx5e_accel_cleanup_tx(priv);
3428-
mlx5e_destroy_tises(priv);
34293377
}
34303378

34313379
static int mlx5e_modify_channels_vsd(struct mlx5e_channels *chs, bool vsd)
@@ -3527,7 +3475,7 @@ static int mlx5e_setup_tc_mqprio_dcb(struct mlx5e_priv *priv,
35273475

35283476
mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
35293477

3530-
if (tc && tc != MLX5E_MAX_NUM_TC)
3478+
if (tc && tc != MLX5_MAX_NUM_TC)
35313479
return -EINVAL;
35323480

35333481
new_params = priv->channels.params;
@@ -5482,23 +5430,13 @@ static int mlx5e_init_nic_tx(struct mlx5e_priv *priv)
54825430
{
54835431
int err;
54845432

5485-
err = mlx5e_create_tises(priv);
5486-
if (err) {
5487-
mlx5_core_warn(priv->mdev, "create tises failed, %d\n", err);
5488-
return err;
5489-
}
5490-
54915433
err = mlx5e_accel_init_tx(priv);
54925434
if (err)
5493-
goto err_destroy_tises;
5435+
return err;
54945436

54955437
mlx5e_set_mqprio_rl(priv);
54965438
mlx5e_dcbnl_initialize(priv);
54975439
return 0;
5498-
5499-
err_destroy_tises:
5500-
mlx5e_destroy_tises(priv);
5501-
return err;
55025440
}
55035441

55045442
static void mlx5e_nic_enable(struct mlx5e_priv *priv)
@@ -5593,7 +5531,7 @@ static const struct mlx5e_profile mlx5e_nic_profile = {
55935531
.update_stats = mlx5e_stats_update_ndo_stats,
55945532
.update_carrier = mlx5e_update_carrier,
55955533
.rx_handlers = &mlx5e_rx_handlers_nic,
5596-
.max_tc = MLX5E_MAX_NUM_TC,
5534+
.max_tc = MLX5_MAX_NUM_TC,
55975535
.stats_grps = mlx5e_nic_stats_grps,
55985536
.stats_grps_num = mlx5e_nic_stats_grps_num,
55995537
.features = BIT(MLX5E_PROFILE_FEATURE_PTP_RX) |

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