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Ansueldavem330
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net: dsa: qca8k: convert to regmap read/write API
Convert qca8k to regmap read/write bulk API. The mgmt eth can write up to 32 bytes of data at times. Currently we use a custom function to do it but regmap now supports declaration of read/write bulk even without a bus. Drop the custom function and rework the regmap function to this new implementation. Rework the qca8k_fdb_read/write function to use the new regmap_bulk_read/write as the old qca8k_bulk_read/write are now dropped. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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‎drivers/net/dsa/qca/qca8k-8xxx.c‎

Lines changed: 73 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -425,16 +425,12 @@ qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, u32 reg, u32 mask, u32 wri
425425
}
426426

427427
static int
428-
qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
428+
qca8k_read_mii(struct qca8k_priv *priv, uint32_t reg, uint32_t *val)
429429
{
430-
struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
431430
struct mii_bus *bus = priv->bus;
432431
u16 r1, r2, page;
433432
int ret;
434433

435-
if (!qca8k_read_eth(priv, reg, val, sizeof(*val)))
436-
return 0;
437-
438434
qca8k_split_addr(reg, &r1, &r2, &page);
439435

440436
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
@@ -451,16 +447,12 @@ qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
451447
}
452448

453449
static int
454-
qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val)
450+
qca8k_write_mii(struct qca8k_priv *priv, uint32_t reg, uint32_t val)
455451
{
456-
struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
457452
struct mii_bus *bus = priv->bus;
458453
u16 r1, r2, page;
459454
int ret;
460455

461-
if (!qca8k_write_eth(priv, reg, &val, sizeof(val)))
462-
return 0;
463-
464456
qca8k_split_addr(reg, &r1, &r2, &page);
465457

466458
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
@@ -477,17 +469,14 @@ qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val)
477469
}
478470

479471
static int
480-
qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val)
472+
qca8k_regmap_update_bits_mii(struct qca8k_priv *priv, uint32_t reg,
473+
uint32_t mask, uint32_t write_val)
481474
{
482-
struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
483475
struct mii_bus *bus = priv->bus;
484476
u16 r1, r2, page;
485477
u32 val;
486478
int ret;
487479

488-
if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val))
489-
return 0;
490-
491480
qca8k_split_addr(reg, &r1, &r2, &page);
492481

493482
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
@@ -510,17 +499,84 @@ qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_
510499
return ret;
511500
}
512501

502+
static int
503+
qca8k_bulk_read(void *ctx, const void *reg_buf, size_t reg_len,
504+
void *val_buf, size_t val_len)
505+
{
506+
int i, count = val_len / sizeof(u32), ret;
507+
u32 reg = *(u32 *)reg_buf & U16_MAX;
508+
struct qca8k_priv *priv = ctx;
509+
510+
if (priv->mgmt_master &&
511+
!qca8k_read_eth(priv, reg, val_buf, val_len))
512+
return 0;
513+
514+
/* loop count times and increment reg of 4 */
515+
for (i = 0; i < count; i++, reg += sizeof(u32)) {
516+
ret = qca8k_read_mii(priv, reg, val_buf + i);
517+
if (ret < 0)
518+
return ret;
519+
}
520+
521+
return 0;
522+
}
523+
524+
static int
525+
qca8k_bulk_gather_write(void *ctx, const void *reg_buf, size_t reg_len,
526+
const void *val_buf, size_t val_len)
527+
{
528+
int i, count = val_len / sizeof(u32), ret;
529+
u32 reg = *(u32 *)reg_buf & U16_MAX;
530+
struct qca8k_priv *priv = ctx;
531+
u32 *val = (u32 *)val_buf;
532+
533+
if (priv->mgmt_master &&
534+
!qca8k_write_eth(priv, reg, val, val_len))
535+
return 0;
536+
537+
/* loop count times, increment reg of 4 and increment val ptr to
538+
* the next value
539+
*/
540+
for (i = 0; i < count; i++, reg += sizeof(u32), val++) {
541+
ret = qca8k_write_mii(priv, reg, *val);
542+
if (ret < 0)
543+
return ret;
544+
}
545+
546+
return 0;
547+
}
548+
549+
static int
550+
qca8k_bulk_write(void *ctx, const void *data, size_t bytes)
551+
{
552+
return qca8k_bulk_gather_write(ctx, data, sizeof(u16), data + sizeof(u16),
553+
bytes - sizeof(u16));
554+
}
555+
556+
static int
557+
qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val)
558+
{
559+
struct qca8k_priv *priv = ctx;
560+
561+
if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val))
562+
return 0;
563+
564+
return qca8k_regmap_update_bits_mii(priv, reg, mask, write_val);
565+
}
566+
513567
static struct regmap_config qca8k_regmap_config = {
514568
.reg_bits = 16,
515569
.val_bits = 32,
516570
.reg_stride = 4,
517571
.max_register = 0x16ac, /* end MIB - Port6 range */
518-
.reg_read = qca8k_regmap_read,
519-
.reg_write = qca8k_regmap_write,
572+
.read = qca8k_bulk_read,
573+
.write = qca8k_bulk_write,
520574
.reg_update_bits = qca8k_regmap_update_bits,
521575
.rd_table = &qca8k_readable_table,
522576
.disable_locking = true, /* Locking is handled by qca8k read/write */
523577
.cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */
578+
.max_raw_read = 32, /* mgmt eth can read/write up to 8 registers at time */
579+
.max_raw_write = 32,
524580
};
525581

526582
static int
@@ -2089,8 +2145,6 @@ static SIMPLE_DEV_PM_OPS(qca8k_pm_ops,
20892145

20902146
static const struct qca8k_info_ops qca8xxx_ops = {
20912147
.autocast_mib = qca8k_get_ethtool_stats_eth,
2092-
.read_eth = qca8k_read_eth,
2093-
.write_eth = qca8k_write_eth,
20942148
};
20952149

20962150
static const struct qca8k_match_data qca8327 = {

‎drivers/net/dsa/qca/qca8k-common.c‎

Lines changed: 4 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -101,45 +101,6 @@ const struct regmap_access_table qca8k_readable_table = {
101101
.n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges),
102102
};
103103

104-
/* TODO: remove these extra ops when we can support regmap bulk read/write */
105-
static int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
106-
{
107-
int i, count = len / sizeof(u32), ret;
108-
109-
if (priv->mgmt_master && priv->info->ops->read_eth &&
110-
!priv->info->ops->read_eth(priv, reg, val, len))
111-
return 0;
112-
113-
for (i = 0; i < count; i++) {
114-
ret = regmap_read(priv->regmap, reg + (i * 4), val + i);
115-
if (ret < 0)
116-
return ret;
117-
}
118-
119-
return 0;
120-
}
121-
122-
/* TODO: remove these extra ops when we can support regmap bulk read/write */
123-
static int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
124-
{
125-
int i, count = len / sizeof(u32), ret;
126-
u32 tmp;
127-
128-
if (priv->mgmt_master && priv->info->ops->write_eth &&
129-
!priv->info->ops->write_eth(priv, reg, val, len))
130-
return 0;
131-
132-
for (i = 0; i < count; i++) {
133-
tmp = val[i];
134-
135-
ret = regmap_write(priv->regmap, reg + (i * 4), tmp);
136-
if (ret < 0)
137-
return ret;
138-
}
139-
140-
return 0;
141-
}
142-
143104
static int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask)
144105
{
145106
u32 val;
@@ -154,8 +115,8 @@ static int qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb)
154115
int ret;
155116

156117
/* load the ARL table into an array */
157-
ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg,
158-
QCA8K_ATU_TABLE_SIZE * sizeof(u32));
118+
ret = regmap_bulk_read(priv->regmap, QCA8K_REG_ATU_DATA0, reg,
119+
QCA8K_ATU_TABLE_SIZE);
159120
if (ret)
160121
return ret;
161122

@@ -196,8 +157,8 @@ static void qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask,
196157
reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]);
197158

198159
/* load the array into the ARL table */
199-
qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg,
200-
QCA8K_ATU_TABLE_SIZE * sizeof(u32));
160+
regmap_bulk_write(priv->regmap, QCA8K_REG_ATU_DATA0, reg,
161+
QCA8K_ATU_TABLE_SIZE);
201162
}
202163

203164
static int qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd,

‎drivers/net/dsa/qca/qca8k.h‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -330,9 +330,6 @@ struct qca8k_priv;
330330

331331
struct qca8k_info_ops {
332332
int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data);
333-
/* TODO: remove these extra ops when we can support regmap bulk read/write */
334-
int (*read_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
335-
int (*write_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
336333
};
337334

338335
struct qca8k_match_data {

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