177177#define MMC_XGMAC_RX_DISCARD_OCT_GB 0x1b4
178178#define MMC_XGMAC_RX_ALIGN_ERR_PKT 0x1bc
179179
180+ #define MMC_XGMAC_SGF_PASS_PKT 0x1f0
181+ #define MMC_XGMAC_SGF_FAIL_PKT 0x1f4
180182#define MMC_XGMAC_TX_FPE_INTR_MASK 0x204
181183#define MMC_XGMAC_TX_FPE_FRAG 0x208
182184#define MMC_XGMAC_TX_HOLD_REQ 0x20c
185+ #define MMC_XGMAC_TX_GATE_OVERRUN 0x210
183186#define MMC_XGMAC_RX_FPE_INTR_MASK 0x224
184187#define MMC_XGMAC_RX_PKT_ASSEMBLY_ERR 0x228
185188#define MMC_XGMAC_RX_PKT_SMD_ERR 0x22c
186189#define MMC_XGMAC_RX_PKT_ASSEMBLY_OK 0x230
187190#define MMC_XGMAC_RX_FPE_FRAG 0x234
188191#define MMC_XGMAC_RX_IPC_INTR_MASK 0x25c
189192
193+ #define MMC_XGMAC_RX_IPV4_GD 0x264
194+ #define MMC_XGMAC_RX_IPV4_HDERR 0x26c
195+ #define MMC_XGMAC_RX_IPV4_NOPAY 0x274
196+ #define MMC_XGMAC_RX_IPV4_FRAG 0x27c
197+ #define MMC_XGMAC_RX_IPV4_UDSBL 0x284
198+
199+ #define MMC_XGMAC_RX_IPV6_GD 0x28c
200+ #define MMC_XGMAC_RX_IPV6_HDERR 0x294
201+ #define MMC_XGMAC_RX_IPV6_NOPAY 0x29c
202+
203+ #define MMC_XGMAC_RX_UDP_GD 0x2a4
204+ #define MMC_XGMAC_RX_UDP_ERR 0x2ac
205+ #define MMC_XGMAC_RX_TCP_GD 0x2b4
206+ #define MMC_XGMAC_RX_TCP_ERR 0x2bc
207+ #define MMC_XGMAC_RX_ICMP_GD 0x2c4
208+ #define MMC_XGMAC_RX_ICMP_ERR 0x2cc
209+
210+ #define MMC_XGMAC_RX_IPV4_GD_OCTETS 0x2d4
211+ #define MMC_XGMAC_RX_IPV4_HDERR_OCTETS 0x2dc
212+ #define MMC_XGMAC_RX_IPV4_NOPAY_OCTETS 0x2e4
213+ #define MMC_XGMAC_RX_IPV4_FRAG_OCTETS 0x2ec
214+ #define MMC_XGMAC_RX_IPV4_UDSBL_OCTETS 0x2f4
215+
216+ #define MMC_XGMAC_RX_IPV6_GD_OCTETS 0x2fc
217+ #define MMC_XGMAC_RX_IPV6_HDERR_OCTETS 0x304
218+ #define MMC_XGMAC_RX_IPV6_NOPAY_OCTETS 0x30c
219+
220+ #define MMC_XGMAC_RX_UDP_GD_OCTETS 0x314
221+ #define MMC_XGMAC_RX_UDP_ERR_OCTETS 0x31c
222+ #define MMC_XGMAC_RX_TCP_GD_OCTETS 0x324
223+ #define MMC_XGMAC_RX_TCP_ERR_OCTETS 0x32c
224+ #define MMC_XGMAC_RX_ICMP_GD_OCTETS 0x334
225+ #define MMC_XGMAC_RX_ICMP_ERR_OCTETS 0x33c
226+
190227static void dwmac_mmc_ctrl (void __iomem * mmcaddr , unsigned int mode )
191228{
192229 u32 value = readl (mmcaddr + MMC_CNTRL );
@@ -414,6 +451,8 @@ static void dwxgmac_mmc_read(void __iomem *mmcaddr, struct stmmac_counters *mmc)
414451 & mmc -> mmc_tx_pause_frame );
415452 dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_TX_VLAN_PKT_G ,
416453 & mmc -> mmc_tx_vlan_frame_g );
454+ mmc -> mmc_tx_lpi_usec += readl (mmcaddr + MMC_XGMAC_TX_LPI_USEC );
455+ mmc -> mmc_tx_lpi_tran += readl (mmcaddr + MMC_XGMAC_TX_LPI_TRAN );
417456
418457 /* MMC RX counter registers */
419458 dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_PKT_GB ,
@@ -459,9 +498,23 @@ static void dwxgmac_mmc_read(void __iomem *mmcaddr, struct stmmac_counters *mmc)
459498 dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_VLAN_PKT_GB ,
460499 & mmc -> mmc_rx_vlan_frames_gb );
461500 mmc -> mmc_rx_watchdog_error += readl (mmcaddr + MMC_XGMAC_RX_WATCHDOG_ERR );
462-
501+ mmc -> mmc_rx_lpi_usec += readl (mmcaddr + MMC_XGMAC_RX_LPI_USEC );
502+ mmc -> mmc_rx_lpi_tran += readl (mmcaddr + MMC_XGMAC_RX_LPI_TRAN );
503+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_DISCARD_PKT_GB ,
504+ & mmc -> mmc_rx_discard_frames_gb );
505+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_DISCARD_OCT_GB ,
506+ & mmc -> mmc_rx_discard_octets_gb );
507+ mmc -> mmc_rx_align_err_frames +=
508+ readl (mmcaddr + MMC_XGMAC_RX_ALIGN_ERR_PKT );
509+
510+ mmc -> mmc_sgf_pass_fragment_cntr +=
511+ readl (mmcaddr + MMC_XGMAC_SGF_PASS_PKT );
512+ mmc -> mmc_sgf_fail_fragment_cntr +=
513+ readl (mmcaddr + MMC_XGMAC_SGF_FAIL_PKT );
463514 mmc -> mmc_tx_fpe_fragment_cntr += readl (mmcaddr + MMC_XGMAC_TX_FPE_FRAG );
464515 mmc -> mmc_tx_hold_req_cntr += readl (mmcaddr + MMC_XGMAC_TX_HOLD_REQ );
516+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_TX_GATE_OVERRUN ,
517+ & mmc -> mmc_tx_gate_overrun_cntr );
465518 mmc -> mmc_rx_packet_assembly_err_cntr +=
466519 readl (mmcaddr + MMC_XGMAC_RX_PKT_ASSEMBLY_ERR );
467520 mmc -> mmc_rx_packet_smd_err_cntr +=
@@ -470,6 +523,68 @@ static void dwxgmac_mmc_read(void __iomem *mmcaddr, struct stmmac_counters *mmc)
470523 readl (mmcaddr + MMC_XGMAC_RX_PKT_ASSEMBLY_OK );
471524 mmc -> mmc_rx_fpe_fragment_cntr +=
472525 readl (mmcaddr + MMC_XGMAC_RX_FPE_FRAG );
526+
527+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_GD ,
528+ & mmc -> mmc_rx_ipv4_gd );
529+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_HDERR ,
530+ & mmc -> mmc_rx_ipv4_hderr );
531+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_NOPAY ,
532+ & mmc -> mmc_rx_ipv4_nopay );
533+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_FRAG ,
534+ & mmc -> mmc_rx_ipv4_frag );
535+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_UDSBL ,
536+ & mmc -> mmc_rx_ipv4_udsbl );
537+
538+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV6_GD ,
539+ & mmc -> mmc_rx_ipv6_gd );
540+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV6_HDERR ,
541+ & mmc -> mmc_rx_ipv6_hderr );
542+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV6_NOPAY ,
543+ & mmc -> mmc_rx_ipv6_nopay );
544+
545+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_UDP_GD ,
546+ & mmc -> mmc_rx_udp_gd );
547+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_UDP_ERR ,
548+ & mmc -> mmc_rx_udp_err );
549+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_TCP_GD ,
550+ & mmc -> mmc_rx_tcp_gd );
551+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_TCP_ERR ,
552+ & mmc -> mmc_rx_tcp_err );
553+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_ICMP_GD ,
554+ & mmc -> mmc_rx_icmp_gd );
555+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_ICMP_ERR ,
556+ & mmc -> mmc_rx_icmp_err );
557+
558+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_GD_OCTETS ,
559+ & mmc -> mmc_rx_ipv4_gd_octets );
560+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_HDERR_OCTETS ,
561+ & mmc -> mmc_rx_ipv4_hderr_octets );
562+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_NOPAY_OCTETS ,
563+ & mmc -> mmc_rx_ipv4_nopay_octets );
564+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_FRAG_OCTETS ,
565+ & mmc -> mmc_rx_ipv4_frag_octets );
566+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV4_UDSBL_OCTETS ,
567+ & mmc -> mmc_rx_ipv4_udsbl_octets );
568+
569+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV6_GD_OCTETS ,
570+ & mmc -> mmc_rx_ipv6_gd_octets );
571+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV6_HDERR_OCTETS ,
572+ & mmc -> mmc_rx_ipv6_hderr_octets );
573+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_IPV6_NOPAY_OCTETS ,
574+ & mmc -> mmc_rx_ipv6_nopay_octets );
575+
576+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_UDP_GD_OCTETS ,
577+ & mmc -> mmc_rx_udp_gd_octets );
578+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_UDP_ERR_OCTETS ,
579+ & mmc -> mmc_rx_udp_err_octets );
580+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_TCP_GD_OCTETS ,
581+ & mmc -> mmc_rx_tcp_gd_octets );
582+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_TCP_ERR_OCTETS ,
583+ & mmc -> mmc_rx_tcp_err_octets );
584+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_ICMP_GD_OCTETS ,
585+ & mmc -> mmc_rx_icmp_gd_octets );
586+ dwxgmac_read_mmc_reg (mmcaddr , MMC_XGMAC_RX_ICMP_ERR_OCTETS ,
587+ & mmc -> mmc_rx_icmp_err_octets );
473588}
474589
475590const struct stmmac_mmc_ops dwxgmac_mmc_ops = {
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