RISC-V: KVM: Fix csr_write -> csr_set for HVIEN PMU overflow bit

mikey · avpatel · commit ea6398a5af81 · 2024-12-06T18:42:38.000+05:30
This doesn't cause a problem currently as HVIEN isn't used elsewhere yet. Found by inspection. Signed-off-by: Michael Neuling <michaelneuling@tenstorrent.com> Fixes: 16b0bde ("RISC-V: KVM: Add perf sampling support for guests") Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20241127041840.419940-1-michaelneuling@tenstorrent.com Signed-off-by: Anup Patel <anup@brainfault.org>
diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c
@@ -590,7 +590,7 @@ void kvm_riscv_aia_enable(void)
 	csr_set(CSR_HIE, BIT(IRQ_S_GEXT));
 	/* Enable IRQ filtering for overflow interrupt only if sscofpmf is present */
 	if (__riscv_isa_extension_available(NULL, RISCV_ISA_EXT_SSCOFPMF))
-		csr_write(CSR_HVIEN, BIT(IRQ_PMU_OVF));
+		csr_set(CSR_HVIEN, BIT(IRQ_PMU_OVF));
 }
 
 void kvm_riscv_aia_disable(void)

Original file line number	Diff line number	Diff line change
`@@ -590,7 +590,7 @@ void kvm_riscv_aia_enable(void)`
`590`	`590`	`csr_set(CSR_HIE, BIT(IRQ_S_GEXT));`
`591`	`591`	`/* Enable IRQ filtering for overflow interrupt only if sscofpmf is present */`
`592`	`592`	`if (__riscv_isa_extension_available(NULL, RISCV_ISA_EXT_SSCOFPMF))`
`593`		`- csr_write(CSR_HVIEN, BIT(IRQ_PMU_OVF));`
	`593`	`+ csr_set(CSR_HVIEN, BIT(IRQ_PMU_OVF));`
`594`	`594`	`}`
`595`	`595`
`596`	`596`	`void kvm_riscv_aia_disable(void)`