Skip to content
This repository was archived by the owner on Jan 23, 2023. It is now read-only.

Commit 37f0188

Browse files
committed
[Arm64] Add compare vector to zero emitters
1 parent f1c7328 commit 37f0188

File tree

1 file changed

+52
-0
lines changed

1 file changed

+52
-0
lines changed

src/jit/emitarm64.cpp

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4234,6 +4234,58 @@ void emitter::emitIns_R_R(
42344234
fmt = IF_DV_2J;
42354235
break;
42364236

4237+
case INS_cmeq:
4238+
case INS_cmge:
4239+
case INS_cmgt:
4240+
case INS_cmle:
4241+
case INS_cmlt:
4242+
assert(isVectorRegister(reg1));
4243+
assert(isVectorRegister(reg2));
4244+
4245+
if (isValidVectorDatasize(size))
4246+
{
4247+
// Vector operation
4248+
assert(insOptsAnyArrangement(opt));
4249+
assert(isValidArrangement(size, opt));
4250+
elemsize = optGetElemsize(opt);
4251+
fmt = IF_DV_2M;
4252+
}
4253+
else
4254+
{
4255+
NYI("Untested");
4256+
// Scalar operation
4257+
assert(size == EA_8BYTE); // Only Double supported
4258+
fmt = IF_DV_2L;
4259+
}
4260+
break;
4261+
4262+
case INS_fcmeq:
4263+
case INS_fcmge:
4264+
case INS_fcmgt:
4265+
case INS_fcmle:
4266+
case INS_fcmlt:
4267+
assert(isVectorRegister(reg1));
4268+
assert(isVectorRegister(reg2));
4269+
4270+
if (isValidVectorDatasize(size))
4271+
{
4272+
// Vector operation
4273+
assert(insOptsAnyArrangement(opt));
4274+
assert(isValidArrangement(size, opt));
4275+
elemsize = optGetElemsize(opt);
4276+
assert((elemsize == EA_8BYTE) || (elemsize == EA_4BYTE)); // Only Double/Float supported
4277+
assert(opt != INS_OPTS_1D); // Reserved encoding
4278+
fmt = IF_DV_2A;
4279+
}
4280+
else
4281+
{
4282+
NYI("Untested");
4283+
// Scalar operation
4284+
assert((size == EA_8BYTE) || (size == EA_4BYTE)); // Only Double/Float supported
4285+
fmt = IF_DV_2G;
4286+
}
4287+
break;
4288+
42374289
default:
42384290
unreached();
42394291
break;

0 commit comments

Comments
 (0)