@@ -184,6 +184,14 @@ bool IsThreeOperandAVXInstruction(instruction ins)
184184 return (IsDstDstSrcAVXInstruction (ins) || IsDstSrcSrcAVXInstruction (ins));
185185}
186186bool Is4ByteAVXInstruction (instruction ins);
187+ bool isAvxBlendv (instruction ins)
188+ {
189+ return ins == INS_vblendvps || ins == INS_vblendvpd || ins == INS_vpblendvb;
190+ }
191+ bool isSse41Blendv (instruction ins)
192+ {
193+ return ins == INS_blendvps || ins == INS_blendvpd || ins == INS_pblendvb;
194+ }
187195#else // LEGACY_BACKEND
188196bool UseVEXEncoding ()
189197{
@@ -226,6 +234,14 @@ bool Is4ByteAVXInstruction(instruction ins)
226234{
227235 return false ;
228236}
237+ bool isAvxBlendv (instruction ins)
238+ {
239+ return false ;
240+ }
241+ bool isSse41Blendv (instruction ins)
242+ {
243+ return false ;
244+ }
229245bool TakesVexPrefix (instruction ins)
230246{
231247 return false ;
@@ -398,7 +414,9 @@ void emitIns_R_R_R_I(instruction ins, emitAttr attr, regNumber reg1, regNumber r
398414
399415void emitIns_R_R_S_I (instruction ins, emitAttr attr, regNumber reg1, regNumber reg2, int varx, int offs, int ival);
400416
417+ #ifndef LEGACY_BACKEND
401418void emitIns_R_R_R_R (instruction ins, emitAttr attr, regNumber reg1, regNumber reg2, regNumber reg3, regNumber reg4);
419+ #endif // !LEGACY_BACKEND
402420
403421void emitIns_S (instruction ins, emitAttr attr, int varx, int offs);
404422
@@ -454,7 +472,7 @@ void emitIns_R_AX(instruction ins, emitAttr attr, regNumber ireg, regNumber reg,
454472
455473void emitIns_AX_R (instruction ins, emitAttr attr, regNumber ireg, regNumber reg, unsigned mul, int disp);
456474
457- #if FEATURE_HW_INTRINSICS
475+ #ifdef FEATURE_HW_INTRINSICS
458476void emitIns_SIMD_R_R_AR (instruction ins, emitAttr attr, regNumber reg, regNumber reg1, regNumber base);
459477void emitIns_SIMD_R_R_A_I (instruction ins, emitAttr attr, regNumber reg, regNumber reg1, GenTreeIndir* indir, int ival);
460478void emitIns_SIMD_R_R_C_I (
@@ -468,7 +486,7 @@ void emitIns_SIMD_R_R_S(instruction ins, emitAttr attr, regNumber reg, regNumber
468486void emitIns_SIMD_R_R_R (instruction ins, emitAttr attr, regNumber reg, regNumber reg1, regNumber reg2);
469487void emitIns_SIMD_R_R_R_R (
470488 instruction ins, emitAttr attr, regNumber reg, regNumber reg1, regNumber reg2, regNumber reg3);
471- #endif
489+ #endif // FEATURE_HW_INTRINSICS
472490
473491#if FEATURE_STACK_FP_X87
474492void emitIns_F_F0 (instruction ins, unsigned fpreg);
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