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Adding support for the SSE compare eq, gt, ge, lt, le, ne, ord, and unord scalar intrinsics
1 parent 38af536 commit eaf9aef

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4 files changed

+68
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lines changed

4 files changed

+68
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lines changed

src/jit/emitxarch.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -87,6 +87,8 @@ bool emitter::IsDstDstSrcAVXInstruction(instruction ins)
8787
case INS_andps:
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case INS_cmppd:
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case INS_cmpps:
90+
case INS_cmpsd:
91+
case INS_cmpss:
9092
case INS_cvtsi2sd:
9193
case INS_cvtsi2ss:
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case INS_divpd:

src/jit/hwintrinsiccodegenxarch.cpp

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -246,52 +246,104 @@ void CodeGen::genSSEIntrinsic(GenTreeHWIntrinsic* node)
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emit->emitIns_SIMD_R_R_R_I(INS_cmpps, targetReg, op1Reg, op2Reg, 0, TYP_SIMD16);
247247
break;
248248

249+
case NI_SSE_CompareEqualScalar:
250+
assert(baseType == TYP_FLOAT);
251+
op2Reg = op2->gtRegNum;
252+
emit->emitIns_SIMD_R_R_R_I(INS_cmpss, targetReg, op1Reg, op2Reg, 0, TYP_SIMD16);
253+
break;
254+
249255
case NI_SSE_CompareGreaterThan:
250256
case NI_SSE_CompareNotLessThanOrEqual:
251257
assert(baseType == TYP_FLOAT);
252258
op2Reg = op2->gtRegNum;
253259
emit->emitIns_SIMD_R_R_R_I(INS_cmpps, targetReg, op1Reg, op2Reg, 6, TYP_SIMD16);
254260
break;
255261

262+
case NI_SSE_CompareGreaterThanScalar:
263+
case NI_SSE_CompareNotLessThanOrEqualScalar:
264+
assert(baseType == TYP_FLOAT);
265+
op2Reg = op2->gtRegNum;
266+
emit->emitIns_SIMD_R_R_R_I(INS_cmpss, targetReg, op1Reg, op2Reg, 6, TYP_SIMD16);
267+
break;
268+
256269
case NI_SSE_CompareGreaterThanOrEqual:
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case NI_SSE_CompareNotLessThan:
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assert(baseType == TYP_FLOAT);
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op2Reg = op2->gtRegNum;
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emit->emitIns_SIMD_R_R_R_I(INS_cmpps, targetReg, op1Reg, op2Reg, 5, TYP_SIMD16);
261274
break;
262275

276+
case NI_SSE_CompareGreaterThanOrEqualScalar:
277+
case NI_SSE_CompareNotLessThanScalar:
278+
assert(baseType == TYP_FLOAT);
279+
op2Reg = op2->gtRegNum;
280+
emit->emitIns_SIMD_R_R_R_I(INS_cmpss, targetReg, op1Reg, op2Reg, 5, TYP_SIMD16);
281+
break;
282+
263283
case NI_SSE_CompareLessThan:
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case NI_SSE_CompareNotGreaterThanOrEqual:
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assert(baseType == TYP_FLOAT);
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op2Reg = op2->gtRegNum;
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emit->emitIns_SIMD_R_R_R_I(INS_cmpps, targetReg, op1Reg, op2Reg, 1, TYP_SIMD16);
268288
break;
269289

290+
case NI_SSE_CompareLessThanScalar:
291+
case NI_SSE_CompareNotGreaterThanOrEqualScalar:
292+
assert(baseType == TYP_FLOAT);
293+
op2Reg = op2->gtRegNum;
294+
emit->emitIns_SIMD_R_R_R_I(INS_cmpss, targetReg, op1Reg, op2Reg, 1, TYP_SIMD16);
295+
break;
296+
270297
case NI_SSE_CompareLessThanOrEqual:
271298
case NI_SSE_CompareNotGreaterThan:
272299
assert(baseType == TYP_FLOAT);
273300
op2Reg = op2->gtRegNum;
274301
emit->emitIns_SIMD_R_R_R_I(INS_cmpps, targetReg, op1Reg, op2Reg, 2, TYP_SIMD16);
275302
break;
276303

304+
case NI_SSE_CompareLessThanOrEqualScalar:
305+
case NI_SSE_CompareNotGreaterThanScalar:
306+
assert(baseType == TYP_FLOAT);
307+
op2Reg = op2->gtRegNum;
308+
emit->emitIns_SIMD_R_R_R_I(INS_cmpss, targetReg, op1Reg, op2Reg, 2, TYP_SIMD16);
309+
break;
310+
277311
case NI_SSE_CompareNotEqual:
278312
assert(baseType == TYP_FLOAT);
279313
op2Reg = op2->gtRegNum;
280314
emit->emitIns_SIMD_R_R_R_I(INS_cmpps, targetReg, op1Reg, op2Reg, 4, TYP_SIMD16);
281315
break;
282316

317+
case NI_SSE_CompareNotEqualScalar:
318+
assert(baseType == TYP_FLOAT);
319+
op2Reg = op2->gtRegNum;
320+
emit->emitIns_SIMD_R_R_R_I(INS_cmpss, targetReg, op1Reg, op2Reg, 4, TYP_SIMD16);
321+
break;
322+
283323
case NI_SSE_CompareOrdered:
284324
assert(baseType == TYP_FLOAT);
285325
op2Reg = op2->gtRegNum;
286326
emit->emitIns_SIMD_R_R_R_I(INS_cmpps, targetReg, op1Reg, op2Reg, 7, TYP_SIMD16);
287327
break;
288328

329+
case NI_SSE_CompareOrderedScalar:
330+
assert(baseType == TYP_FLOAT);
331+
op2Reg = op2->gtRegNum;
332+
emit->emitIns_SIMD_R_R_R_I(INS_cmpss, targetReg, op1Reg, op2Reg, 7, TYP_SIMD16);
333+
break;
334+
289335
case NI_SSE_CompareUnordered:
290336
assert(baseType == TYP_FLOAT);
291337
op2Reg = op2->gtRegNum;
292338
emit->emitIns_SIMD_R_R_R_I(INS_cmpps, targetReg, op1Reg, op2Reg, 3, TYP_SIMD16);
293339
break;
294340

341+
case NI_SSE_CompareUnorderedScalar:
342+
assert(baseType == TYP_FLOAT);
343+
op2Reg = op2->gtRegNum;
344+
emit->emitIns_SIMD_R_R_R_I(INS_cmpss, targetReg, op1Reg, op2Reg, 3, TYP_SIMD16);
345+
break;
346+
295347
case NI_SSE_Divide:
296348
assert(baseType == TYP_FLOAT);
297349
op2Reg = op2->gtRegNum;

src/jit/hwintrinsicxarch.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -525,17 +525,29 @@ GenTree* Compiler::impSSEIntrinsic(NamedIntrinsic intrinsic,
525525
case NI_SSE_And:
526526
case NI_SSE_AndNot:
527527
case NI_SSE_CompareEqual:
528+
case NI_SSE_CompareEqualScalar:
528529
case NI_SSE_CompareGreaterThan:
530+
case NI_SSE_CompareGreaterThanScalar:
529531
case NI_SSE_CompareGreaterThanOrEqual:
532+
case NI_SSE_CompareGreaterThanOrEqualScalar:
530533
case NI_SSE_CompareLessThan:
534+
case NI_SSE_CompareLessThanScalar:
531535
case NI_SSE_CompareLessThanOrEqual:
536+
case NI_SSE_CompareLessThanOrEqualScalar:
532537
case NI_SSE_CompareNotEqual:
538+
case NI_SSE_CompareNotEqualScalar:
533539
case NI_SSE_CompareNotGreaterThan:
540+
case NI_SSE_CompareNotGreaterThanScalar:
534541
case NI_SSE_CompareNotGreaterThanOrEqual:
542+
case NI_SSE_CompareNotGreaterThanOrEqualScalar:
535543
case NI_SSE_CompareNotLessThan:
544+
case NI_SSE_CompareNotLessThanScalar:
536545
case NI_SSE_CompareNotLessThanOrEqual:
546+
case NI_SSE_CompareNotLessThanOrEqualScalar:
537547
case NI_SSE_CompareOrdered:
548+
case NI_SSE_CompareOrderedScalar:
538549
case NI_SSE_CompareUnordered:
550+
case NI_SSE_CompareUnorderedScalar:
539551
case NI_SSE_Divide:
540552
case NI_SSE_DivideScalar:
541553
case NI_SSE_Max:

src/jit/instrsxarch.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -289,6 +289,8 @@ INST3( ucomisd, "ucomisd", 0, IUM_RD, 0, 0, BAD_CODE, BAD_CODE, PCKDBL(0x2E
289289
// Note that these instructions not only compare but also overwrite the first source.
290290
INST3( cmpps, "cmpps", 0, IUM_WR, 0, 0, BAD_CODE, BAD_CODE, PCKFLT(0xC2)) // compare packed singles
291291
INST3( cmppd, "cmppd", 0, IUM_WR, 0, 0, BAD_CODE, BAD_CODE, PCKDBL(0xC2)) // compare packed doubles
292+
INST3( cmpss, "cmpss", 0, IUM_WR, 0, 0, BAD_CODE, BAD_CODE, SSEFLT(0xC2)) // compare scalar singles
293+
INST3( cmpsd, "cmpsd", 0, IUM_WR, 0, 0, BAD_CODE, BAD_CODE, SSEDBL(0xC2)) // compare scalar doubles
292294

293295
//SSE2 packed integer operations
294296
INST3( paddb, "paddb" , 0, IUM_WR, 0, 0, BAD_CODE, BAD_CODE, PCKDBL(0xFC)) // Add packed byte integers

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