Clean up clrjit from using sizeof(void*) when meant TARGET_POINTER_SIZE (#15524)

Author: echesakov

src/jit/codegencommon.cpp

@@ -3113,7 +3113,7 @@ void CodeGen::genGenerateCode(void** codePtr, ULONG* nativeSizeOfCode)
     // and thus saved on the frame).
 
     // Compute the maximum estimated spill temp size.
-    unsigned maxTmpSize = sizeof(double) + sizeof(float) + sizeof(__int64) + sizeof(void*);
+    unsigned maxTmpSize = sizeof(double) + sizeof(float) + sizeof(__int64) + TARGET_POINTER_SIZE;
 
     maxTmpSize += (compiler->tmpDoubleSpillMax * sizeof(double)) + (compiler->tmpIntSpillMax * sizeof(int));
 
@@ -5122,7 +5122,7 @@ void CodeGen::genFnPrologCalleeRegArgs(regNumber xtraReg, bool* pXtraRegClobbere
             // idea of how to ignore it.
 
             // On Arm, a long can be passed in register
-            noway_assert(genTypeSize(genActualType(varDsc->TypeGet())) == sizeof(void*));
+            noway_assert(genTypeSize(genActualType(varDsc->TypeGet())) == TARGET_POINTER_SIZE);
 #endif
 #endif //_TARGET_64BIT_
 
@@ -5618,7 +5618,7 @@ void CodeGen::genCheckUseBlockInit()
             initStkLclCnt += varDsc->lvStructGcCount;
         }
 
-        if ((compiler->lvaLclSize(varNum) > (3 * sizeof(void*))) && (largeGcStructs <= 4))
+        if ((compiler->lvaLclSize(varNum) > (3 * TARGET_POINTER_SIZE)) && (largeGcStructs <= 4))
         {
             largeGcStructs++;
         }
@@ -9151,10 +9151,10 @@ void CodeGen::genFnProlog()
     if (compiler->ehNeedsShadowSPslots() && !compiler->info.compInitMem)
     {
         // The last slot is reserved for ICodeManager::FixContext(ppEndRegion)
-        unsigned filterEndOffsetSlotOffs = compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) - (sizeof(void*));
+        unsigned filterEndOffsetSlotOffs = compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) - TARGET_POINTER_SIZE;
 
         // Zero out the slot for nesting level 0
-        unsigned firstSlotOffs = filterEndOffsetSlotOffs - (sizeof(void*));
+        unsigned firstSlotOffs = filterEndOffsetSlotOffs - TARGET_POINTER_SIZE;
 
         if (!initRegZeroed)
         {
@@ -9779,7 +9779,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
             /* Add 'compiler->compLclFrameSize' to ESP */
             /* Use pop ECX to increment ESP by 4, unless compiler->compJmpOpUsed is true */
 
-            if ((compiler->compLclFrameSize == sizeof(void*)) && !compiler->compJmpOpUsed)
+            if ((compiler->compLclFrameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed)
             {
                 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
                 regTracker.rsTrackRegTrash(REG_ECX);
@@ -10008,8 +10008,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 
         if (fCalleePop)
         {
-            noway_assert(compiler->compArgSize >= intRegState.rsCalleeRegArgCount * sizeof(void*));
-            stkArgSize = compiler->compArgSize - intRegState.rsCalleeRegArgCount * sizeof(void*);
+            noway_assert(compiler->compArgSize >= intRegState.rsCalleeRegArgCount * REGSIZE_BYTES);
+            stkArgSize = compiler->compArgSize - intRegState.rsCalleeRegArgCount * REGSIZE_BYTES;
 
             noway_assert(compiler->compArgSize < 0x10000); // "ret" only has 2 byte operand
         }
@@ -11948,7 +11948,7 @@ void CodeGen::genSetScopeInfo(unsigned            which,
 
         noway_assert(cookieOffset < varOffset);
         unsigned offset     = varOffset - cookieOffset;
-        unsigned stkArgSize = compiler->compArgSize - intRegState.rsCalleeRegArgCount * sizeof(void*);
+        unsigned stkArgSize = compiler->compArgSize - intRegState.rsCalleeRegArgCount * REGSIZE_BYTES;
         noway_assert(offset < stkArgSize);
         offset = stkArgSize - offset;
 

src/jit/codegenlegacy.cpp

@@ -5090,11 +5090,12 @@ void CodeGen::genCodeForTreeLeaf(GenTreePtr tree, regMaskTP destReg, regMaskTP b
             // The last slot is reserved for ICodeManager::FixContext(ppEndRegion)
             unsigned filterEndOffsetSlotOffs;
             PREFIX_ASSUME(compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) >
-                          sizeof(void*)); // below doesn't underflow.
-            filterEndOffsetSlotOffs = (unsigned)(compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) - (sizeof(void*)));
+                          TARGET_POINTER_SIZE); // below doesn't underflow.
+            filterEndOffsetSlotOffs =
+                (unsigned)(compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) - TARGET_POINTER_SIZE);
 
             unsigned curNestingSlotOffs;
-            curNestingSlotOffs = filterEndOffsetSlotOffs - ((finallyNesting + 1) * sizeof(void*));
+            curNestingSlotOffs = filterEndOffsetSlotOffs - ((finallyNesting + 1) * TARGET_POINTER_SIZE);
             instGen_Store_Imm_Into_Lcl(TYP_I_IMPL, EA_PTRSIZE, 0, compiler->lvaShadowSPslotsVar, curNestingSlotOffs);
             reg = REG_STK;
             break;
@@ -13047,14 +13048,14 @@ void CodeGen::genCodeForBBlist()
                 // The last slot is reserved for ICodeManager::FixContext(ppEndRegion)
                 unsigned filterEndOffsetSlotOffs;
                 filterEndOffsetSlotOffs =
-                    (unsigned)(compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) - (sizeof(void*)));
+                    (unsigned)(compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) - TARGET_POINTER_SIZE);
 
                 unsigned curNestingSlotOffs;
-                curNestingSlotOffs = (unsigned)(filterEndOffsetSlotOffs - ((finallyNesting + 1) * sizeof(void*)));
+                curNestingSlotOffs = (unsigned)(filterEndOffsetSlotOffs - ((finallyNesting + 1) * TARGET_POINTER_SIZE));
 
                 // Zero out the slot for the next nesting level
                 instGen_Store_Imm_Into_Lcl(TYP_I_IMPL, EA_PTRSIZE, 0, compiler->lvaShadowSPslotsVar,
-                                           curNestingSlotOffs - sizeof(void*));
+                                           curNestingSlotOffs - TARGET_POINTER_SIZE);
 
                 instGen_Store_Imm_Into_Lcl(TYP_I_IMPL, EA_PTRSIZE, LCL_FINALLY_MARK, compiler->lvaShadowSPslotsVar,
                                            curNestingSlotOffs);
@@ -15977,7 +15978,8 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                             addrReg = 0;
 
                             // Get the number of BYTES to copy to the stack
-                            opsz = roundUp(compiler->info.compCompHnd->getClassSize(arg->gtObj.gtClass), sizeof(void*));
+                            opsz = roundUp(compiler->info.compCompHnd->getClassSize(arg->gtObj.gtClass),
+                                           TARGET_POINTER_SIZE);
                             size_t bytesToBeCopied = opsz;
 
                             // postponedFields is true if we have any postponed fields
@@ -16020,14 +16022,14 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                                 if (fieldVarDsc->lvStackAligned())
                                 {
                                     if (fieldVarDsc->lvExactSize != 2 * sizeof(unsigned) &&
-                                        fieldVarDsc->lvFldOffset + sizeof(void*) != bytesToBeCopied)
+                                        fieldVarDsc->lvFldOffset + TARGET_POINTER_SIZE != bytesToBeCopied)
                                     {
                                         // Might need 4-bytes paddings for fields other than LONG and DOUBLE.
                                         // Just push some junk (i.e EAX) on the stack.
                                         inst_RV(INS_push, REG_EAX, TYP_INT);
                                         genSinglePush();
 
-                                        bytesToBeCopied -= sizeof(void*);
+                                        bytesToBeCopied -= TARGET_POINTER_SIZE;
                                     }
 
                                     // If we have an expectedAlignedOffset make sure that this push instruction
@@ -16060,11 +16062,11 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                                         }
                                         else
                                         {
-                                            getEmitter()->emitIns_S(INS_push, EA_4BYTE, varNum, sizeof(void*));
+                                            getEmitter()->emitIns_S(INS_push, EA_4BYTE, varNum, TARGET_POINTER_SIZE);
                                             genSinglePush();
                                         }
 
-                                        bytesToBeCopied -= sizeof(void*);
+                                        bytesToBeCopied -= TARGET_POINTER_SIZE;
                                     }
 
                                     // Push the "upper half" of DOUBLE var if it is not enregistered.
@@ -16073,11 +16075,11 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                                     {
                                         if (!fieldVarDsc->lvRegister)
                                         {
-                                            getEmitter()->emitIns_S(INS_push, EA_4BYTE, varNum, sizeof(void*));
+                                            getEmitter()->emitIns_S(INS_push, EA_4BYTE, varNum, TARGET_POINTER_SIZE);
                                             genSinglePush();
                                         }
 
-                                        bytesToBeCopied -= sizeof(void*);
+                                        bytesToBeCopied -= TARGET_POINTER_SIZE;
                                     }
 
                                     //
@@ -16156,7 +16158,7 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                                         genSinglePush();
                                     }
 
-                                    bytesToBeCopied -= sizeof(void*);
+                                    bytesToBeCopied -= TARGET_POINTER_SIZE;
                                 }
                                 else // not stack aligned
                                 {
@@ -16171,11 +16173,12 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                                         // This should never change until it is set back to UINT_MAX by an aligned
                                         // offset
                                         noway_assert(expectedAlignedOffset ==
-                                                     roundUp(fieldVarDsc->lvFldOffset, sizeof(void*)) - sizeof(void*));
+                                                     roundUp(fieldVarDsc->lvFldOffset, TARGET_POINTER_SIZE) -
+                                                         TARGET_POINTER_SIZE);
                                     }
 
                                     expectedAlignedOffset =
-                                        roundUp(fieldVarDsc->lvFldOffset, sizeof(void*)) - sizeof(void*);
+                                        roundUp(fieldVarDsc->lvFldOffset, TARGET_POINTER_SIZE) - TARGET_POINTER_SIZE;
 
                                     noway_assert(expectedAlignedOffset < bytesToBeCopied);
 
@@ -16302,8 +16305,8 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                     noway_assert(arg->gtObj.gtOp1->InReg());
                     regNumber reg = arg->gtObj.gtOp1->gtRegNum;
                     // Get the number of DWORDS to copy to the stack
-                    opsz = roundUp(compiler->info.compCompHnd->getClassSize(arg->gtObj.gtClass), sizeof(void*));
-                    unsigned slots = (unsigned)(opsz / sizeof(void*));
+                    opsz = roundUp(compiler->info.compCompHnd->getClassSize(arg->gtObj.gtClass), sizeof(DWORD));
+                    unsigned slots = (unsigned)(opsz / sizeof(DWORD));
 
                     BYTE* gcLayout = new (compiler, CMK_Codegen) BYTE[slots];
 
@@ -16355,7 +16358,7 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
 
                         if (opsz & 0x4)
                         {
-                            stkDisp -= sizeof(void*);
+                            stkDisp -= TARGET_POINTER_SIZE;
                             getEmitter()->emitIns_AR_R(INS_push, EA_4BYTE, REG_NA, reg, stkDisp);
                             genSinglePush();
                         }
@@ -16367,7 +16370,7 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                         {
                             getEmitter()->emitIns_R_AR(INS_movq, EA_8BYTE, xmmReg, reg, curDisp);
                             getEmitter()->emitIns_AR_R(INS_movq, EA_8BYTE, xmmReg, REG_SPBASE, curDisp);
-                            curDisp += 2 * sizeof(void*);
+                            curDisp += 2 * TARGET_POINTER_SIZE;
                         }
                         noway_assert(curDisp == stkDisp);
                     }
@@ -16385,7 +16388,7 @@ size_t CodeGen::genPushArgList(GenTreeCall* call)
                                 noway_assert(gcLayout[i] == TYPE_GC_BYREF);
                                 fieldSize = EA_BYREF;
                             }
-                            getEmitter()->emitIns_AR_R(INS_push, fieldSize, REG_NA, reg, i * sizeof(void*));
+                            getEmitter()->emitIns_AR_R(INS_push, fieldSize, REG_NA, reg, i * TARGET_POINTER_SIZE);
                             genSinglePush();
                         }
                     }
@@ -19290,7 +19293,7 @@ regMaskTP CodeGen::genCodeForCall(GenTreeCall* call, bool valUsed)
                         /* Keep track of ESP for EBP-less frames */
                         genSinglePush();
 
-                        argSize += sizeof(void*);
+                        argSize += REGSIZE_BYTES;
 
 #elif defined(_TARGET_ARM_)
 
@@ -19683,16 +19686,16 @@ regMaskTP CodeGen::genCodeForCall(GenTreeCall* call, bool valUsed)
         // Push the count of the incoming stack arguments
 
         unsigned nOldStkArgs =
-            (unsigned)((compiler->compArgSize - (intRegState.rsCalleeRegArgCount * sizeof(void*))) / sizeof(void*));
+            (unsigned)((compiler->compArgSize - (intRegState.rsCalleeRegArgCount * REGSIZE_BYTES)) / REGSIZE_BYTES);
         getEmitter()->emitIns_I(INS_push, EA_4BYTE, nOldStkArgs);
         genSinglePush(); // Keep track of ESP for EBP-less frames
-        args += sizeof(void*);
+        args += REGSIZE_BYTES;
 
         // Push the count of the outgoing stack arguments
 
-        getEmitter()->emitIns_I(INS_push, EA_4BYTE, argSize / sizeof(void*));
+        getEmitter()->emitIns_I(INS_push, EA_4BYTE, argSize / REGSIZE_BYTES);
         genSinglePush(); // Keep track of ESP for EBP-less frames
-        args += sizeof(void*);
+        args += REGSIZE_BYTES;
 
         // Push info about the callee-saved registers to be restored
         // For now, we always spill all registers if compiler->compTailCallUsed
@@ -19701,13 +19704,13 @@ regMaskTP CodeGen::genCodeForCall(GenTreeCall* call, bool valUsed)
                                    (fTailCallTargetIsVSD ? 0x2 : 0x0); // Stub dispatch flag
         getEmitter()->emitIns_I(INS_push, EA_4BYTE, calleeSavedRegInfo);
         genSinglePush(); // Keep track of ESP for EBP-less frames
-        args += sizeof(void*);
+        args += REGSIZE_BYTES;
 
         // Push the address of the target function
 
         getEmitter()->emitIns_R(INS_push, EA_4BYTE, REG_TAILCALL_ADDR);
         genSinglePush(); // Keep track of ESP for EBP-less frames
-        args += sizeof(void*);
+        args += REGSIZE_BYTES;
 
 #else // _TARGET_X86_
 

src/jit/compiler.cpp

@@ -2179,7 +2179,7 @@ unsigned Compiler::compGetTypeSize(CorInfoType cit, CORINFO_CLASS_HANDLE clsHnd)
     }
     else if (cit == CORINFO_TYPE_REFANY)
     {
-        sigSize = 2 * sizeof(void*);
+        sigSize = 2 * TARGET_POINTER_SIZE;
     }
     return sigSize;
 }

src/jit/compiler.h

@@ -743,7 +743,7 @@ class LclVarDsc
     bool lvStackAligned() const
     {
         assert(lvIsStructField);
-        return ((lvFldOffset % sizeof(void*)) == 0);
+        return ((lvFldOffset % TARGET_POINTER_SIZE) == 0);
     }
     bool lvNormalizeOnLoad() const
     {

src/jit/compiler.hpp

@@ -2131,7 +2131,7 @@ inline void LclVarDsc::addPrefReg(regMaskTP regMask, Compiler* comp)
 
 #ifdef _TARGET_ARM_
     // Don't set a preferred register for a TYP_STRUCT that takes more than one register slot
-    if ((lvType == TYP_STRUCT) && (lvSize() > sizeof(void*)))
+    if ((lvType == TYP_STRUCT) && (lvSize() > REGSIZE_BYTES))
         return;
 #endif
 

src/jit/ee_il_dll.cpp

@@ -441,7 +441,7 @@ unsigned Compiler::eeGetArgSize(CORINFO_ARG_LIST_HANDLE list, CORINFO_SIG_INFO*
         return structSize; // TODO: roundUp() needed here?
     }
 #endif // FEATURE_UNIX_AMD64_STRUCT_PASSING
-    return sizeof(size_t);
+    return TARGET_POINTER_SIZE;
 
 #else // !_TARGET_AMD64_
 
@@ -454,7 +454,7 @@ unsigned Compiler::eeGetArgSize(CORINFO_ARG_LIST_HANDLE list, CORINFO_SIG_INFO*
         unsigned structSize = info.compCompHnd->getClassSize(argClass);
 
         // make certain the EE passes us back the right thing for refanys
-        assert(argTypeJit != CORINFO_TYPE_REFANY || structSize == 2 * sizeof(void*));
+        assert(argTypeJit != CORINFO_TYPE_REFANY || structSize == 2 * TARGET_POINTER_SIZE);
 
         // For each target that supports passing struct args in multiple registers
         // apply the target specific rules for them here: