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@0dvictor 0dvictor commented Aug 2, 2018

All known downstream projects uses SSE/SSE2 for floating point operations;
however OMR itself still kept X87 as default on X86-32.
This commit turns SSE/SSE2 on as default, allowing OMR's tests exercising SSE/SSE2 route.
X87 support is deprecated, and will be removed.

Closes #2429

Signed-off-by: Victor Ding dvictor@ca.ibm.com

@0dvictor 0dvictor force-pushed the sse branch 3 times, most recently from 52716af to 388c50b Compare August 2, 2018 04:01
@0dvictor 0dvictor force-pushed the sse branch 2 times, most recently from a2a165c to 17bd256 Compare August 2, 2018 19:00
@vijaysun-omr vijaysun-omr self-assigned this Aug 7, 2018
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I think @0xdaryl and @andrewcraik should review this.

@0dvictor 0dvictor force-pushed the sse branch 2 times, most recently from ae46c6f to 8131749 Compare August 14, 2018 18:19
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I have separated changes that does not strictly belong to enabling SSE/SSE2 into different pull requests: #2852 and #2853.

Note that now this pull request requires #2852.

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0xdaryl commented Aug 14, 2018

You should mark this PR as a WIP until #2852 is merged then.

@0dvictor 0dvictor changed the title Enable SSE/SSE2 on OMR X86-32 WIP: Enable SSE/SSE2 on OMR X86-32 Aug 14, 2018
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0dvictor commented Aug 14, 2018

You should mark this PR as a WIP until #2852 is merged then.

Good point, done.

@0dvictor 0dvictor mentioned this pull request Aug 14, 2018
@0dvictor 0dvictor changed the title WIP: Enable SSE/SSE2 on OMR X86-32 Enable SSE/SSE2 on OMR X86-32 Aug 15, 2018
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#2852 has been merged, and this pull request is ready to be merged.

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I "formally" requested a review from @0xdaryl and will use this comment to ping @andrewcraik for reviews. Both are currently away so this one will need to sit for a couple of weeks, I'm afraid.

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looks fine to me - it has been quite a while since there was an x86 processor without SSE/SSE2...

@vijaysun-omr
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Awaiting your review @0xdaryl please.

@0dvictor
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0dvictor commented Nov 8, 2018

Conflicts have been resolved.

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@0xdaryl ping now that the conflicts are resolved

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0xdaryl commented Nov 12, 2018

I'm going to be working out a staged plan for SSE removal from OMR this week as part of #946. There are obviously some OpenJ9 dependencies with this work. I want to make sure merging this PR now follows that plan as I don't want us to be taking random potshots at removing it. Hope that's ok.

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Sure that sounds good @0xdaryl
We just need guidance for this PR to be concluded or re-worked and hopefully that is possible this week.

@0dvictor 0dvictor requested a review from mstoodle as a code owner November 23, 2018 20:29
hzongaro pushed a commit to hzongaro/omr that referenced this pull request Nov 26, 2018
As it is discussed in eclipse-omr#2822, X87 support is deprecated, and will be
removed. This fact lets us the opportunity to remove
'TR_X86FPStackIterator' from the codebase as the first step to
consolidate implementations of RegisterIterator.

Issue: eclipse-omr#2645
Signed-off-by: Pavel Samolysov <samolisov@gmail.com>
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@0xdaryl this is waiting for your opinion.

@Leonardo2718
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@0xdaryl ping

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@0xdaryl ping

@0dvictor 0dvictor force-pushed the sse branch 2 times, most recently from a4de184 to 19c544c Compare March 12, 2019 22:20
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The AppVeyor failure is due to infra.

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Restarted AppVeyor build.

@vijaysun-omr
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@0xdaryl ping

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@0xdaryl ping?

All known downstream projects uses SSE/SSE2 for floating point operations;
however OMR itself still kept X87 as default on X86-32.
This commit turns SSE/SSE2 on as default, allowing OMR's tests exercising SSE/SSE2 route.
X87 support is deprecated, and will be removed.

Signed-off-by: Victor Ding <dvictor@ca.ibm.com>
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0xdaryl commented Apr 29, 2021

Subsumed by #5965.

@0xdaryl 0xdaryl closed this Apr 29, 2021
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Turn SSE/SSE2 on as default on X86-32

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