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Upstream synchronization - Partial [v0.18] #65

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Merged
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Nov 5, 2025
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Upstream synchronization - Partial [v0.18] #65

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9 changes: 6 additions & 3 deletions src/portable/synopsys/dwc2/dwc2_common.c
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2024 Ha Thach (tinyusb.org)
* Copyright (c) 2024-2025 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
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//
//--------------------------------------------------------------------
static void reset_core(dwc2_regs_t* dwc2) {
// load gsnpsid (it is not readable after reset is asserted)
uint32_t gsnpsid = dwc2->gsnpsid;

// reset core
dwc2->grstctl |= GRSTCTL_CSRST;

if ((dwc2->gsnpsid & DWC2_CORE_REV_MASK) < (DWC2_CORE_REV_4_20a & DWC2_CORE_REV_MASK)) {
// prior v42.0 CSRST is self-clearing
if ((gsnpsid & DWC2_CORE_REV_MASK) < (DWC2_CORE_REV_4_20a & DWC2_CORE_REV_MASK)) {
// prior v4.20a CSRST is self-clearing
while (dwc2->grstctl & GRSTCTL_CSRST) {}
} else {
// From v4.20a CSRST bit is write only, CSRT_DONE (w1c) is introduced for checking.
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