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add initial Graviton 4 support #5053

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Merged
merged 3 commits into from
Feb 26, 2025
Merged

add initial Graviton 4 support #5053

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5a162ee
feat: add support got Graviton 4 cpu detection
ShadowCurse Feb 26, 2025
429152d
feat: add Graviton 4 guest cpu features
ShadowCurse Feb 26, 2025
f699459
feat: add Graviton 4 host vs guest cpu difference
ShadowCurse Feb 26, 2025
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7 changes: 6 additions & 1 deletion tests/framework/utils_cpuid.py
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Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@ class CpuModel(str, Enum):
AMD_GENOA = "AMD_GENOA"
ARM_NEOVERSE_N1 = "ARM_NEOVERSE_N1"
ARM_NEOVERSE_V1 = "ARM_NEOVERSE_V1"
ARM_NEOVERSE_V2 = "ARM_NEOVERSE_V2"
INTEL_SKYLAKE = "INTEL_SKYLAKE"
INTEL_CASCADELAKE = "INTEL_CASCADELAKE"
INTEL_ICELAKE = "INTEL_ICELAKE"
Expand All @@ -41,7 +42,11 @@ class CpuModel(str, Enum):
"Intel(R) Xeon(R) Platinum 8375C CPU": "INTEL_ICELAKE",
},
CpuVendor.AMD: {"AMD EPYC 7R13": "AMD_MILAN", "AMD EPYC 9R14": "AMD_GENOA"},
CpuVendor.ARM: {"0xd0c": "ARM_NEOVERSE_N1", "0xd40": "ARM_NEOVERSE_V1"},
CpuVendor.ARM: {
"0xd0c": "ARM_NEOVERSE_N1",
"0xd40": "ARM_NEOVERSE_V1",
"0xd4f": "ARM_NEOVERSE_V2",
},
}


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4 changes: 4 additions & 0 deletions tests/integration_tests/functional/test_cpu_features_aarch64.py
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Expand Up @@ -24,6 +24,8 @@

G3_SVE_AND_PAC = set("paca pacg sve svebf16 svei8mm".split())

G4_FEATS = (G3_FEATS | set("bti flagm2 frint sb".split())) - set("sm3 sm4".split())


def test_guest_cpu_features(uvm_any):
"""Check the CPU features for a microvm with different CPU templates"""
Expand All @@ -43,6 +45,8 @@ def test_guest_cpu_features(uvm_any):
expected_cpu_features = G3_FEATS | G3_SVE_AND_PAC
case CpuModel.ARM_NEOVERSE_V1, None:
expected_cpu_features = G3_FEATS
case CpuModel.ARM_NEOVERSE_V2, None:
expected_cpu_features = G4_FEATS

guest_feats = set(vm.ssh.check_output(CPU_FEATURES_CMD).stdout.split())
assert guest_feats == expected_cpu_features
11 changes: 10 additions & 1 deletion tests/integration_tests/functional/test_cpu_features_host_vs_guest.py
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Expand Up @@ -257,12 +257,21 @@ def test_host_vs_guest_cpu_features(uvm_nano):
assert host_feats - guest_feats == expected_host_minus_guest
assert guest_feats - host_feats == expected_guest_minus_host

case CpuModel.ARM_NEOVERSE_V1:
case CpuModel.ARM_NEOVERSE_V1 | CpuModel.ARM_NEOVERSE_V2:
expected_guest_minus_host = set()
# KVM does not enable PAC or SVE features by default
# and Firecracker does not enable them either.
expected_host_minus_guest = {"paca", "pacg", "sve", "svebf16", "svei8mm"}

if CPU_MODEL == CpuModel.ARM_NEOVERSE_V2:
expected_host_minus_guest |= {
"svebitperm",
"svesha3",
"sveaes",
"sve2",
"svepmull",
}

# Upstream kernel v6.11+ hides "ssbs" from "lscpu" on Neoverse-N1 and Neoverse-V1 since
# they have an errata whereby an MSR to the SSBS special-purpose register does not
# affect subsequent speculative instructions, permitting speculative store bypassing for
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