R5900 multimedia instructions (MMI)

The R5900 has a set of multimedia instructions (MMI) operating on the 128-bit general purpose registers (GPR). Each register is partitioned into parallel integer fields of 16×8 bits, 8×16 bits, 4×32 bits, or 2×64 bits, or floating-point fields of 4×32 bits, depending on the instruction.

Comparison with the MIPS SIMD architecture (MSA):

_	R5900 MMI	MIPS SIMD (MSA)
Vector registers	32 GPRs (shadowed)	32 vector registers
Vector width	128 bits	128 bits
Shift amount (SA) register	yes	no
HI1 and LO1 registers	yes	no
Access	Always enabled	?
Calling convention	?	?
...	...	...