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56 changes: 34 additions & 22 deletions ihp/cells/antennas.py
Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,23 @@ def DrawContArray(
return x_min, y_min, x_max, y_max


@gf.cell
@gf.cell(
tags=["IHP", "diode", "antenna"],
symbol="diode",
ports={"left": ["1"], "right": ["2"]},
models=[{
"language": "spice",
"name": "dantenna",
"spice_type": "SUBCKT",
"library": "cornerDIO.lib",
"sections": ["dio_tt", "dio_ss", "dio_ff"],
"port_order": ["1", "2"],
"params": {
"w": "width * 1e-6",
"l": "length * 1e-6",
},
}],
)
def dantenna(
width: float = 0.78,
length: float = 0.78,
Expand Down Expand Up @@ -225,20 +241,26 @@ def dantenna(
)
).move((-diods_over, -diods_over))

# VLSIR Simulation Metadata
c.info["vlsir"] = {
"model": "dantenna",
"spice_type": "SUBCKT",
"spice_lib": "diodes.lib",
"port_order": ["1", "2"],
"port_map": {}, # No physical ports defined on component
"params": {"w": width * 1e-6, "l": length * 1e-6},
}

return c


@gf.cell
@gf.cell(
tags=["IHP", "diode", "antenna"],
symbol="diode",
ports={"left": ["1"], "right": ["2"]},
models=[{
"language": "spice",
"name": "dpantenna",
"spice_type": "SUBCKT",
"library": "cornerDIO.lib",
"sections": ["dio_tt", "dio_ss", "dio_ff"],
"port_order": ["1", "2"],
"params": {
"w": "width * 1e-6",
"l": "length * 1e-6",
},
}],
)
def dpantenna(
width: float = 0.78,
length: float = 0.78,
Expand Down Expand Up @@ -348,16 +370,6 @@ def dpantenna(
)
).move((-NW_c, -NW_c))

# VLSIR Simulation Metadata
c.info["vlsir"] = {
"model": "dpantenna",
"spice_type": "SUBCKT",
"spice_lib": "diodes.lib",
"port_order": ["1", "2"],
"port_map": {}, # No physical ports defined on component
"params": {"w": width * 1e-6, "l": length * 1e-6},
}

return c


Expand Down
119 changes: 66 additions & 53 deletions ihp/cells/bjt_transistors.py
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,25 @@ def _snap_width_to_grid(width_um: float) -> float:
return round(w / grid) * grid


@gf.cell
@gf.cell(
tags=["IHP", "bjt", "npn"],
symbol="npn",
ports={"top": ["C"], "left": ["B"], "bottom": ["E"], "right": ["S"]},
models=[{
"language": "spice",
"name": "npn13G2",
"spice_type": "SUBCKT",
"library": "cornerHBT.lib",
"sections": ["hbt_typ", "hbt_bcs", "hbt_wcs"],
"port_order": ["C", "B", "E", "S"],
"params": {
"Nx": "Nx",
"Ny": "Ny",
"we": "emitter_width * 1e-6",
"le": "emitter_length * 1e-6",
},
}],
)
def npn13G2(
baspolyx: float = 0.3,
bipwinx: float = 0.07,
Expand Down Expand Up @@ -720,27 +738,28 @@ def npn13G2(
port_type="electrical",
)

# VLSIR Simulation Metadata
c.info["vlsir"] = {
"model": "npn13G2",
"spice_type": "SUBCKT",
"spice_lib": "sg13g2_hbt_mod.lib",
"port_order": ["c", "b", "e", "bn"],
"port_map": {"C": "c", "B": "b", "E": "e"},
"params": {
"Nx": Nx,
"Ny": Ny,
"we": emitter_width * 1e-6,
"le": emitter_length * 1e-6,
},
}

# TODO: Extend to handle empoly, bipwin, cmet

return c


@gf.cell
@gf.cell(
tags=["IHP", "bjt", "npn"],
symbol="npn",
ports={"top": ["C"], "left": ["B"], "bottom": ["E"], "right": ["S"]},
models=[{
"language": "spice",
"name": "npn13G2l",
"spice_type": "SUBCKT",
"library": "cornerHBT.lib",
"sections": ["hbt_typ", "hbt_bcs", "hbt_wcs"],
"port_order": ["C", "B", "E", "S"],
"params": {
"we": "emitter_width * 1e-6",
"le": "emitter_length * 1e-6",
},
}],
)
def npn13G2L(
emitter_length: float = 1,
emitter_width: float = 0.07,
Expand Down Expand Up @@ -1295,23 +1314,26 @@ def npn13G2L(
),
)

# VLSIR Simulation Metadata
c.info["vlsir"] = {
"model": "npn13G2l",
"spice_type": "SUBCKT",
"spice_lib": "sg13g2_hbt_mod.lib",
"port_order": ["c", "b", "e", "bn"],
"port_map": {"C": "c", "B": "b", "E": "e"},
"params": {
"we": emitter_width * 1e-6,
"le": emitter_length * 1e-6,
},
}

return c


@gf.cell
@gf.cell(
tags=["IHP", "bjt", "npn"],
symbol="npn",
ports={"top": ["C"], "left": ["B"], "bottom": ["E"], "right": ["S"]},
models=[{
"language": "spice",
"name": "npn13G2v",
"spice_type": "SUBCKT",
"library": "cornerHBT.lib",
"sections": ["hbt_typ", "hbt_bcs", "hbt_wcs"],
"port_order": ["C", "B", "E", "S"],
"params": {
"we": "emitter_width * 1e-6",
"le": "emitter_length * 1e-6",
},
}],
)
def npn13G2V(
emitter_length: float = 1,
emitter_width: float = 0.12,
Expand Down Expand Up @@ -1887,19 +1909,6 @@ def npn13G2V(
),
)

# VLSIR Simulation Metadata
c.info["vlsir"] = {
"model": "npn13G2v",
"spice_type": "SUBCKT",
"spice_lib": "sg13g2_hbt_mod.lib",
"port_order": ["c", "b", "e", "bn"],
"port_map": {"C": "c", "B": "b", "E": "e"},
"params": {
"we": emitter_width * 1e-6,
"le": emitter_length * 1e-6,
},
}

return c


Expand Down Expand Up @@ -1992,7 +2001,19 @@ def contactArray(
x = x + ws + dsx


@gf.cell
@gf.cell(
tags=["IHP", "bjt", "pnp"],
symbol="pnp",
ports={"top": ["C"], "left": ["B"], "bottom": ["E"]},
models=[{
"language": "spice",
"name": "pnpMPA",
"spice_type": "SUBCKT",
"library": "cornerHBT.lib",
"sections": ["hbt_typ", "hbt_bcs", "hbt_wcs"],
"port_order": ["C", "B", "E"],
}],
)
def pnpMPA(length: float = 2, width: float = 0.7) -> gf.Component:
"""Returns the IHP pnpMPA BJT transistor as a gdsfactory Component.

Expand Down Expand Up @@ -2446,14 +2467,6 @@ def pnpMPA(length: float = 2, width: float = 0.7) -> gf.Component:
port_type="electrical",
)

c.info["vlsir"] = {
"model": "pnpMPA",
"spice_type": "SUBCKT",
"spice_lib": "sg13g2_hbt_mod.lib",
"port_order": ["c", "b", "e"],
"port_map": {"MINUS": "c", "TIE": "b", "PLUS": "e"},
}

return c


Expand Down
26 changes: 12 additions & 14 deletions ihp/cells/bondpads.py
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,18 @@ def regular_octagon_points(diameter: float):
]


@gf.cell
@gf.cell(
tags=["IHP", "bondpad"],
symbol="ckt",
ports={"left": ["PAD"]},
models=[{
"language": "spice",
"name": "bondpad",
"spice_type": "SUBCKT",
"library": "sg13g2_bondpad.lib",
"port_order": ["PAD"],
}],
)
def bondpad(
shape: Literal["octagon", "square", "circle"] = "octagon",
diameter: float = 80.0,
Expand Down Expand Up @@ -102,19 +113,6 @@ def bondpad(
c.info["diameter"] = diameter
c.info["top_metal"] = layer_top_metal

# VLSIR Simulation Metadata
c.info["vlsir"] = {
"model": "bondpad",
"spice_type": "SUBCKT",
"spice_lib": "sg13g2_bondpad.lib",
"port_order": ["PAD"],
"port_map": {"pad": "PAD"},
"params": {
"size": diameter * 1e-6,
"shape": {"octagon": 0, "square": 1, "circle": 2}[shape],
"padtype": 0, # TODO
},
}

return c

Expand Down
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