Updating the roadmap and adding a design roadmap.#1016
Updating the roadmap and adding a design roadmap.#1016
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Generally LGTM!
Most of the comments are of the form "unlike C++, the English comma operator is a good thing to use" :)
| set of coming features in the [design roadmap](roadmap_design.md). | ||
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| ### Frontend: SavedModel/TF2.0 | ||
| ## Summer 2020 |
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I assume you are saying what follows will be true in summer 2020? If so, maybe title this "Expected state: Summer 2020".
This confused me.
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Actually, reading the content, should this be "Spring 2020"?
| ### Sequencer: IR Refactoring | ||
| We want to plug in [Marl](https://github.com/google/marl) to provide CPU-side | ||
| work scheduling that matches GPU semantics. This should be roughly equivalent to | ||
| performance to Swiftshader executiong SPIR-V however with far less overhead. |
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... which is not great for the dense kernels... still planning to punch out to RUY or something until that catches up?
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| ### Sequencer: Dynamic Shapes | ||
| A large part of the codegen story for both CPU (via LLVM IR) and GPU (via | ||
| SPIR-V) relies on the upstream Linalg dialect and associated lowerings. We are |
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| @@ -49,21 +58,3 @@ To better engage with the WebGPU and WebML efforts we will be implementing a | |||
| SPIR-V kernels as the Vulkan backend but enables us to target Metal, Direct3D | |||
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Grammar? Maybe s/but/, which/
| that not been the case. There are discussions happening about an upstream MLIR | ||
| [Tensor Compute Primitives](https://llvm.discourse.group/t/development-of-high-level-tensor-compute-primitives-dialect-s-and-transformations/388/) | ||
| dialect that HLO can be lowered into, allowing IREE (and other backends) to | ||
| decouple themselves from XLA. |
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and potentially be more easily targetable from the frontends.
| ### Transient Tensor Ringbuffer | ||
| <a id="markdown-transient-tensor-ringbuffer" name="transient-tensor-ringbuffer"></a> | ||
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| When properly implemented almost all buffers required during execution never |
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Comma after "implemented"
| `%sz = std.muli %cst, %dyn_dim : index` bytes doesn't materially change how the | ||
| allocations are performed. Since almost all usage involves simple write head | ||
| bumps there is no need for ahead-of-time memory planning or large fixed | ||
| allocations, and since no buffer within the ringbuffer can alias we can have |
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Comma after "alias"
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(that'd be a comma splice)
| runs a dedicated IREE thread to do this, but the expectation is that | ||
| applications can often do a better (and importantly more predictable) job. | ||
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| By utilizing coroutines IREE will have a way to fill traditional pipeline |
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Comma after "coroutines"
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(that'd be a comma splice)
| #### Cellular Batching | ||
| <a id="markdown-cellular-batching" name="cellular-batching"></a> | ||
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| Though coroutines help throughput there is a way we've found to reduce latency |
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Comma after "throughput"
| <a id="markdown-lowering-to-llvm-ir" name="lowering-to-llvm-ir"></a> | ||
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| For scenarios where dynamic module loading is not required and entire modules | ||
| can be compiled into applications we can lower the VM IR to LLVM IR within |
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Comma after "applications"
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Mostly just a brain dump, but significantly better than nothing and something we can expand on as needed (or link to dedicated docs).