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haokexingregkh
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net: macb: Shuffle the tx ring before enabling tx
[ Upstream commit 881a026 ] Quanyang observed that when using an NFS rootfs on an AMD ZynqMp board, the rootfs may take an extended time to recover after a suspend. Upon investigation, it was determined that the issue originates from a problem in the macb driver. According to the Zynq UltraScale TRM [1], when transmit is disabled, the transmit buffer queue pointer resets to point to the address specified by the transmit buffer queue base address register. In the current implementation, the code merely resets `queue->tx_head` and `queue->tx_tail` to '0'. This approach presents several issues: - Packets already queued in the tx ring are silently lost, leading to memory leaks since the associated skbs cannot be released. - Concurrent write access to `queue->tx_head` and `queue->tx_tail` may occur from `macb_tx_poll()` or `macb_start_xmit()` when these values are reset to '0'. - The transmission may become stuck on a packet that has already been sent out, with its 'TX_USED' bit set, but has not yet been processed. However, due to the manipulation of 'queue->tx_head' and 'queue->tx_tail', `macb_tx_poll()` incorrectly assumes there are no packets to handle because `queue->tx_head == queue->tx_tail`. This issue is only resolved when a new packet is placed at this position. This is the root cause of the prolonged recovery time observed for the NFS root filesystem. To resolve this issue, shuffle the tx ring and tx skb array so that the first unsent packet is positioned at the start of the tx ring. Additionally, ensure that updates to `queue->tx_head` and `queue->tx_tail` are properly protected with the appropriate lock. [1] https://docs.amd.com/v/u/en-US/ug1085-zynq-ultrascale-trm Fixes: bf9cf80 ("net: macb: Fix tx/rx malfunction after phy link down and up") Reported-by: Quanyang Wang <quanyang.wang@windriver.com> Signed-off-by: Kevin Hao <haokexin@gmail.com> Cc: stable@vger.kernel.org Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260307-zynqmp-v2-1-6ef98a70e1d0@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> [ #include context ] Signed-off-by: Sasha Levin <sashal@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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drivers/net/ethernet/cadence/macb_main.c

Lines changed: 95 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@
3838
#include <linux/ptp_classify.h>
3939
#include <linux/reset.h>
4040
#include <linux/firmware/xlnx-zynqmp.h>
41+
#include <linux/gcd.h>
4142
#include "macb.h"
4243

4344
/* This structure is only used for MACB on SiFive FU540 devices */
@@ -719,6 +720,97 @@ static void macb_mac_link_down(struct phylink_config *config, unsigned int mode,
719720
netif_tx_stop_all_queues(ndev);
720721
}
721722

723+
/* Use juggling algorithm to left rotate tx ring and tx skb array */
724+
static void gem_shuffle_tx_one_ring(struct macb_queue *queue)
725+
{
726+
unsigned int head, tail, count, ring_size, desc_size;
727+
struct macb_tx_skb tx_skb, *skb_curr, *skb_next;
728+
struct macb_dma_desc *desc_curr, *desc_next;
729+
unsigned int i, cycles, shift, curr, next;
730+
struct macb *bp = queue->bp;
731+
unsigned char desc[24];
732+
unsigned long flags;
733+
734+
desc_size = macb_dma_desc_get_size(bp);
735+
736+
if (WARN_ON_ONCE(desc_size > ARRAY_SIZE(desc)))
737+
return;
738+
739+
spin_lock_irqsave(&queue->tx_ptr_lock, flags);
740+
head = queue->tx_head;
741+
tail = queue->tx_tail;
742+
ring_size = bp->tx_ring_size;
743+
count = CIRC_CNT(head, tail, ring_size);
744+
745+
if (!(tail % ring_size))
746+
goto unlock;
747+
748+
if (!count) {
749+
queue->tx_head = 0;
750+
queue->tx_tail = 0;
751+
goto unlock;
752+
}
753+
754+
shift = tail % ring_size;
755+
cycles = gcd(ring_size, shift);
756+
757+
for (i = 0; i < cycles; i++) {
758+
memcpy(&desc, macb_tx_desc(queue, i), desc_size);
759+
memcpy(&tx_skb, macb_tx_skb(queue, i),
760+
sizeof(struct macb_tx_skb));
761+
762+
curr = i;
763+
next = (curr + shift) % ring_size;
764+
765+
while (next != i) {
766+
desc_curr = macb_tx_desc(queue, curr);
767+
desc_next = macb_tx_desc(queue, next);
768+
769+
memcpy(desc_curr, desc_next, desc_size);
770+
771+
if (next == ring_size - 1)
772+
desc_curr->ctrl &= ~MACB_BIT(TX_WRAP);
773+
if (curr == ring_size - 1)
774+
desc_curr->ctrl |= MACB_BIT(TX_WRAP);
775+
776+
skb_curr = macb_tx_skb(queue, curr);
777+
skb_next = macb_tx_skb(queue, next);
778+
memcpy(skb_curr, skb_next, sizeof(struct macb_tx_skb));
779+
780+
curr = next;
781+
next = (curr + shift) % ring_size;
782+
}
783+
784+
desc_curr = macb_tx_desc(queue, curr);
785+
memcpy(desc_curr, &desc, desc_size);
786+
if (i == ring_size - 1)
787+
desc_curr->ctrl &= ~MACB_BIT(TX_WRAP);
788+
if (curr == ring_size - 1)
789+
desc_curr->ctrl |= MACB_BIT(TX_WRAP);
790+
memcpy(macb_tx_skb(queue, curr), &tx_skb,
791+
sizeof(struct macb_tx_skb));
792+
}
793+
794+
queue->tx_head = count;
795+
queue->tx_tail = 0;
796+
797+
/* Make descriptor updates visible to hardware */
798+
wmb();
799+
800+
unlock:
801+
spin_unlock_irqrestore(&queue->tx_ptr_lock, flags);
802+
}
803+
804+
/* Rotate the queue so that the tail is at index 0 */
805+
static void gem_shuffle_tx_rings(struct macb *bp)
806+
{
807+
struct macb_queue *queue;
808+
int q;
809+
810+
for (q = 0, queue = bp->queues; q < bp->num_queues; q++, queue++)
811+
gem_shuffle_tx_one_ring(queue);
812+
}
813+
722814
static void macb_mac_link_up(struct phylink_config *config,
723815
struct phy_device *phy,
724816
unsigned int mode, phy_interface_t interface,
@@ -757,8 +849,6 @@ static void macb_mac_link_up(struct phylink_config *config,
757849
ctrl |= MACB_BIT(PAE);
758850

759851
for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {
760-
queue->tx_head = 0;
761-
queue->tx_tail = 0;
762852
queue_writel(queue, IER,
763853
bp->rx_intr_mask | MACB_TX_INT_FLAGS | MACB_BIT(HRESP));
764854
}
@@ -772,8 +862,10 @@ static void macb_mac_link_up(struct phylink_config *config,
772862

773863
spin_unlock_irqrestore(&bp->lock, flags);
774864

775-
if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC))
865+
if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC)) {
776866
macb_set_tx_clk(bp, speed);
867+
gem_shuffle_tx_rings(bp);
868+
}
777869

778870
/* Enable Rx and Tx; Enable PTP unicast */
779871
ctrl = macb_readl(bp, NCR);

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