STM32U575 Synopsys peripheral, CDC host issues.

[picdev2]

I work with stm32u575 as a host using cdc class.
Usb host work in general but I have came across with an issue on bulk transfers endpoints.
Usb host ask for data (to device) every 125usec.
In case the device has issues and respond with NAK, Host uses retries then this drop to 60usec.
These interrupts cost a lot of in process power.
I found that changing HFIR register I can Increase SOF packet to 1msec, (for this reason I patch the tiny usb on hcd_init() function),
Is there a way to decrease the interval of these interrupts?
(I have not enable DMA also what frequency is recommended for system clock for running usb host?)

In this case USB device respond always with NAK interrupt interval is at 65usec,

[picdev2]

After some search , I try to poll for available data from host every 50ms (at my previous work around I was polling for new data inside super loop).
At the image you can see that bulk in request is active for 10ms until device respond with available data.
A Nack response from device ,cause this interrupt burst.
Is there any knowledge on how rx callbacks work?

[HiFiPhile]

Please use DMA where NAK retry is automatic.

I must be dreaming, I thought there is a max NAK config option like stm32_fsdev....

[picdev2]

Dma use also interrupts , for finishing or starting transaction, but I will try it.
Maybe I can also disable retries ? In case I polling new packet in superloop I dont think that I need retryies.

[HiFiPhile]

NAK doesn't count as a new transaction.

[picdev2]

Thank you for help , I took a quick look on the channel xfer start function , that enables the NAK interrupt(maybe I can disable it in my case) but maybe others interrupts like errors , have the same "issue" , actually in dma transfer it does not enable all these interrupts.
Thanks for your help I will come back with after my work around.

[picdev2]

I see that stm32u575 does not support DMA with synopsys usb peripheral.

[HiFiPhile]

Oh yes 3 controllers on the same family is confusing.

[picdev2]

after some work around and with the help of AI, I found a way to disable retries in data in transfers.
maybe brake the rules of bulk in transfers but in my case is acceptable.
it would be better to have configurable retries but I don’t have deep knowledge of the the driver.

> `// retry an IN transfer, channel must be halted
> static void channel_xfer_in_retry(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hcint) {
>   hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
>   hcd_endpoint_t* edpt = &_hcd_data.edpt[xfer->ep_id];
>   dwc2_channel_t* channel = &dwc2->channel[ch_id];
>   dwc2_channel_char_t hcchar = {.value = channel->hcchar};
> 
>   if (channel_is_periodic(hcchar.value)){
>     const dwc2_channel_split_t hcsplt = {.value = channel->hcsplt};
>     // retry immediately for periodic split NYET if we haven't reach max retry
>     if (hcsplt.split_en && hcsplt.split_compl && (hcint & HCINT_NYET || xfer->halted_nyet)) {
>       xfer->period_split_nyet_count++;
>       xfer->halted_nyet = 0;
>       if (xfer->period_split_nyet_count < HCD_XFER_PERIOD_SPLIT_NYET_MAX) {
>         hcchar.odd_frame = 1 - (dwc2->hfnum & 1); // transfer on next frame
>         channel->hcchar = hcchar.value;
>         channel_send_in_token(dwc2, channel);
>         return;
>       } else {
>         // too many NYET, de-allocate channel with below code
>         xfer->period_split_nyet_count = 0;
>       }
>     }
> 
>     const uint32_t ucount = (hprt_speed_get(dwc2) == TUSB_SPEED_HIGH ? 1 : 8);
>     if (edpt->uframe_interval == ucount) {
>       // retry on next frame if bInterval is 1
>       hcchar.odd_frame = 1 - (dwc2->hfnum & 1);
>       channel->hcchar = hcchar.value;
>       channel_send_in_token(dwc2, channel);
>     } else {
>       // otherwise, de-allocate channel, enable SOF set frame counter for later transfer
>       const dwc2_channel_tsize_t hctsiz = {.value = channel->hctsiz};
>       edpt->next_pid = hctsiz.pid; // save PID
>       edpt->uframe_countdown = edpt->uframe_interval - ucount;
>       // enable SOF interrupt if not already enabled
>       if (0 == (dwc2->gintmsk & GINTMSK_SOFM)) {
>         dwc2->gintsts = GINTSTS_SOF;
>         dwc2->gintmsk |= GINTMSK_SOFM;
>       }
>       // already halted, de-allocate channel (called from DMA isr)
>       channel_dealloc(dwc2, ch_id);
>     }
>   } else {
> 	//-------------Patch----------------------------------------------------//
> 	// With this definition, the host does not retry BULK IN transfers.
> 	// Otherwise, the host periodically polls the device (every 65–125 µs),
> 	// generating frequent interrupts and increasing CPU loa
>     #ifdef DWC_HOST_DISABLE_BULK_IN_NAK_RETRIES
> 		// for control/bulk: NAK — inject completion event to re-arm from upper layer
> 		const dwc2_channel_tsize_t hctsiz = {.value = channel->hctsiz};
> 		edpt->next_pid = hctsiz.pid;          //save DATA toggle
> 	    xfer->result   = XFER_RESULT_SUCCESS; // triggers is_done=true in caller
> 
> 		dwc2_channel_char_t hcchar_bm = {.value = channel->hcchar};
> 	    const uint8_t ep_addr = tu_edpt_addr(hcchar_bm.ep_num, hcchar_bm.ep_dir);
> 
> 		channel_dealloc(dwc2, ch_id);         //free channel BEFORE posting event
> 		// post 0-byte success event — tuh_task() will call cdch_xfer_cb()
> 		// which calls tu_edpt_stream_read_xfer() → hcd_edpt_xfer() → new IN token
> 	    hcd_event_xfer_complete(hcchar_bm.dev_addr, ep_addr, 0, XFER_RESULT_SUCCESS, true);
> 	#else
> 	    // for control/bulk: retry immediately
>    		channel_send_in_token(dwc2, channel);
>    	#endif
>    
>   }
> }`