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Add rom device support #213

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Jun 21, 2019
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Add rom device support #213

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27 changes: 17 additions & 10 deletions core/ept2.c
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Original file line number Diff line number Diff line change
Expand Up @@ -84,16 +84,6 @@ int ept_handle_access_violation(hax_gpa_space *gpa_space, hax_ept_tree *tree,
uint64_t start_gpa, size;
int ret;

// Extract bits 5..3 from Exit Qualification
combined_perm = (uint) ((qual.raw >> 3) & 7);
// See IA SDM Vol. 3C 27.2.1 Table 27-7, especially note 2
if (combined_perm != HAX_EPT_PERM_NONE) {
hax_error("%s: Cannot handle the case where the PTE corresponding to"
" the faulting GPA is present: qual=0x%llx, gpa=0x%llx\n",
__func__, qual.raw, gpa);
return -EACCES;
}

gfn = gpa >> PG_ORDER_4K;
hax_assert(gpa_space != NULL);
slot = memslot_find(gpa_space, gfn);
Expand All @@ -103,6 +93,23 @@ int ept_handle_access_violation(hax_gpa_space *gpa_space, hax_ept_tree *tree,
return 0;
}

// Extract bits 5..3 from Exit Qualification
combined_perm = (uint) ((qual.raw >> 3) & 7);
if (combined_perm != HAX_EPT_PERM_NONE) {
if ((qual.raw & HAX_EPT_ACC_W) && !(combined_perm & HAX_EPT_PERM_W) &&
(slot->flags == HAX_MEMSLOT_READONLY)) {
// Handle a write to ROM/ROM device as MMIO
hax_debug("%s: write to a read-only gpa=0x%llx\n",
__func__, gpa);
return 0;
}
// See IA SDM Vol. 3C 27.2.1 Table 27-7, especially note 2
hax_error("%s: Cannot handle the case where the PTE corresponding to"
" the faulting GPA is present: qual=0x%llx, gpa=0x%llx\n",
__func__, qual.raw, gpa);
return -EACCES;
}

// Ideally we should call gpa_space_is_page_protected() and ask user space
// to unprotect just the host virtual page that |gfn| maps to. But since we
// pin host RAM one chunk (rather than one page) at a time, if the chunk
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5 changes: 5 additions & 0 deletions core/include/ept2.h
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Original file line number Diff line number Diff line change
Expand Up @@ -45,9 +45,14 @@
#define HAX_EPT_TABLE_SHIFT 9
#define HAX_EPT_TABLE_SIZE (1 << HAX_EPT_TABLE_SHIFT)

#define HAX_EPT_ACC_R 0x1
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How about 'HAX_EPT_ACCESS_R'? Why define read access as 0x1 rather than 0x4?

#define HAX_EPT_ACC_W 0x2
#define HAX_EPT_ACC_X 0x4

#define HAX_EPT_PERM_NONE 0x0
#define HAX_EPT_PERM_RWX 0x7
#define HAX_EPT_PERM_RX 0x5
#define HAX_EPT_PERM_W 0x2

#define HAX_EPT_MEMTYPE_UC 0x0
#define HAX_EPT_MEMTYPE_WB 0x6
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