update designs/template

Author: lazarenk

designs/template/CMakeLists.txt

@@ -5,15 +5,29 @@
 # 
 # *****************************************************************************
 
+cmake_minimum_required(VERSION 3.12)
+
+enable_testing()
+
+if(NOT DEFINED ENV{ICSC_HOME})
+  message("ICSC_HOME is not defined!")
+  return()
+endif()
+
 # Design template
 project(mydesign)
 
+## SVC package contains ScTool and SystemC libraries
+find_package(SVC REQUIRED)
+
+# C++ standard must be the same as in ScTool, $(SystemC_CXX_STANDARD) contains 17
+set(CMAKE_CXX_STANDARD 17)
+
+#include_directories($ENV{ICSC_HOME}/include)
+
 # All synthesizable source files must be listed here (not in libraries)
 add_executable(mydesign example.cpp)
 
-# Test source directory
-target_include_directories(mydesign PUBLIC $ENV{ICSC_HOME}/examples/template)
-
 # Add compilation options
 # target_compile_definitions(mydesign PUBLIC -DMYOPTION)
 # target_compile_options(mydesign PUBLIC -Wall)
@@ -25,4 +39,4 @@ target_include_directories(mydesign PUBLIC $ENV{ICSC_HOME}/examples/template)
 # and @mydesign that runs general SystemC simulation
 # ELAB_TOP parameter accepts hierarchical name of DUT  
 # (that is SystemC name, returned by sc_object::name() method)
-svc_target(mydesign ELAB_TOP tb.dut_inst)
+svc_target(mydesign INIT_LOCAL_VARS ELAB_TOP tb.dut_inst)

designs/template/dut.h

@@ -9,33 +9,42 @@
 
 struct Dut : sc_module 
 {
+    typedef sc_uint<16> data_t;
+    
     sc_in<bool>         clk{"clk"};
     sc_in<bool>         rstn{"rstn"};
 
-    sc_signal<sc_uint<16>>  s{"s"};
+    sc_in<data_t>       inp{"inp"};
+    sc_out<data_t>      outp{"outp"};
+    
 
     SC_CTOR(Dut) 
     {
-	SC_CTHREAD(threadProc, clk.pos());
-	async_reset_signal_is(rstn, false);
+        SC_CTHREAD(threadProc, clk.pos());
+        async_reset_signal_is(rstn, false);
 
-	SC_METHOD(methodProc);
-	sensitive << s;  // Add all signal/ports read in method function here
+        SC_METHOD(methodProc);
+        sensitive << tmps;  // Add all signal/ports read in method function here
     }
+    
+    sc_signal<data_t>   tmps{"tmps"};
 
     void threadProc() 
     {
         // Reset signal/output port values here
+        tmps = 0;
         wait();
 
         while (true) {
             // Place sequential logic here
+            tmps = inp;
             wait();
         }
     }
 
     void methodProc() {
         // Place combinational logic here
+        outp = tmps.read() + data_t(1);
     }
 
-};
+};

designs/template/example.cpp

@@ -7,34 +7,51 @@
 
 // Design template
 
-#include "dut.h"
 #include <systemc.h>
+#include "dut.h"
 
 // ICSC requires DUT top should be instantiated inside wrapper (typically TB) 
 // and all DUT ports are bound.
 struct Tb : sc_module 
 {
+    typedef Dut::data_t data_t;
+    
     sc_in_clk           clk{"clk"};
     sc_signal<bool>     rstn{"rstn"};
+    
+    sc_signal<data_t>   inp{"inp"};
+    sc_signal<data_t>   outp{"outp"};
 
     Dut dut_inst{"dut_inst"};
 
+
     SC_CTOR(Tb) 
     {
         dut_inst.clk(clk);
         dut_inst.rstn(rstn);
+        dut_inst.inp(inp);
+        dut_inst.outp(outp);
 
         SC_CTHREAD(test_proc, clk.pos());
     }
 
-    // Assert and de-assert reset for DUT
     void test_proc() 
     {
+        cout << "test_proc() started" << endl;
+        
+        // Assert and de-assert reset for DUT
         rstn = 0;
+        inp = 0;
         wait();
         rstn = 1;
 
         // Add testbench code here
+        inp  = 10;
+        wait(2);
+        inp  = 0;
+        sc_assert(outp.read() == 11);
+        sc_stop();
+        cout << "test_proc() finished!" << endl;
     }
 };
 
@@ -45,4 +62,4 @@ int sc_main (int argc, char **argv)
     tb.clk(clk);
     sc_start();
     return 0;
-}
+}