Skip to content

Commit d31e955

Browse files
committed
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
The only slightly tricky merge conflict was the netdevsim because the mutex locking fix overlapped a lot of driver reload reorganization. The rest were (relatively) trivial in nature. Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents c23fcbb + 1204c70 commit d31e955

File tree

623 files changed

+5913
-3528
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

623 files changed

+5913
-3528
lines changed

.mailmap

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -196,7 +196,8 @@ Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de>
196196
Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
197197
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
198198
Patrick Mochel <mochel@digitalimplant.org>
199-
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
199+
Paul Burton <paulburton@kernel.org> <paul.burton@imgtec.com>
200+
Paul Burton <paulburton@kernel.org> <paul.burton@mips.com>
200201
Peter A Jonsson <pj@ludd.ltu.se>
201202
Peter Oruba <peter@oruba.de>
202203
Peter Oruba <peter.oruba@amd.com>
@@ -229,6 +230,7 @@ Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com>
229230
Shuah Khan <shuah@kernel.org> <shuah.khan@hp.com>
230231
Shuah Khan <shuah@kernel.org> <shuahkh@osg.samsung.com>
231232
Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
233+
Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
232234
Simon Kelley <simon@thekelleys.org.uk>
233235
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
234236
Stephen Hemminger <shemminger@osdl.org>

Documentation/arm64/silicon-errata.rst

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,11 @@ stable kernels.
9191
| ARM | MMU-500 | #841119,826419 | N/A |
9292
+----------------+-----------------+-----------------+-----------------------------+
9393
+----------------+-----------------+-----------------+-----------------------------+
94+
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 |
95+
+----------------+-----------------+-----------------+-----------------------------+
96+
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |
97+
+----------------+-----------------+-----------------+-----------------------------+
98+
+----------------+-----------------+-----------------+-----------------------------+
9499
| Cavium | ThunderX ITS | #22375,24313 | CAVIUM_ERRATUM_22375 |
95100
+----------------+-----------------+-----------------+-----------------------------+
96101
| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
@@ -126,7 +131,7 @@ stable kernels.
126131
+----------------+-----------------+-----------------+-----------------------------+
127132
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
128133
+----------------+-----------------+-----------------+-----------------------------+
129-
| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
134+
| Qualcomm Tech. | Kryo/Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
130135
+----------------+-----------------+-----------------+-----------------------------+
131136
| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
132137
+----------------+-----------------+-----------------+-----------------------------+

Documentation/devicetree/bindings/arm/rockchip.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -496,12 +496,12 @@ properties:
496496

497497
- description: Theobroma Systems RK3368-uQ7 with Haikou baseboard
498498
items:
499-
- const: tsd,rk3368-uq7-haikou
499+
- const: tsd,rk3368-lion-haikou
500500
- const: rockchip,rk3368
501501

502502
- description: Theobroma Systems RK3399-Q7 with Haikou baseboard
503503
items:
504-
- const: tsd,rk3399-q7-haikou
504+
- const: tsd,rk3399-puma-haikou
505505
- const: rockchip,rk3399
506506

507507
- description: Tronsmart Orion R68 Meta

Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,11 @@
11
* Advanced Interrupt Controller (AIC)
22

33
Required properties:
4-
- compatible: Should be "atmel,<chip>-aic"
5-
<chip> can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4"
4+
- compatible: Should be:
5+
- "atmel,<chip>-aic" where <chip> can be "at91rm9200", "sama5d2",
6+
"sama5d3" or "sama5d4"
7+
- "microchip,<chip>-aic" where <chip> can be "sam9x60"
8+
69
- interrupt-controller: Identifies the node as an interrupt controller.
710
- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
811
The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).

Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
22
%YAML 1.2
33
---
4-
$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml#
4+
$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
55
$schema: http://devicetree.org/meta-schemas/core.yaml#
66

77
title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
@@ -27,14 +27,12 @@ properties:
2727
clocks:
2828
items:
2929
- description: The CSI interface clock
30-
- description: The CSI module clock
3130
- description: The CSI ISP clock
3231
- description: The CSI DRAM clock
3332

3433
clock-names:
3534
items:
3635
- const: bus
37-
- const: mod
3836
- const: isp
3937
- const: ram
4038

@@ -89,9 +87,8 @@ examples:
8987
compatible = "allwinner,sun7i-a20-csi0";
9088
reg = <0x01c09000 0x1000>;
9189
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
92-
clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>,
93-
<&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
94-
clock-names = "bus", "mod", "isp", "ram";
90+
clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
91+
clock-names = "bus", "isp", "ram";
9592
resets = <&ccu RST_CSI0>;
9693
9794
port {

Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml

Lines changed: 42 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -33,13 +33,13 @@ patternProperties:
3333
allOf:
3434
- $ref: "/schemas/types.yaml#/definitions/string"
3535
- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
36-
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, ESPI,
37-
ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWSPIWP, GPIT0, GPIT1,
38-
GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1, GPIU2,
39-
GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, I2C1, I2C10, I2C11, I2C12,
40-
I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6, I2C7,
41-
I2C8, I2C9, I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ, LPC,
42-
LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2,
36+
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMC,
37+
ESPI, ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWSPIWP, GPIT0,
38+
GPIT1, GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1,
39+
GPIU2, GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, I2C1, I2C10, I2C11,
40+
I2C12, I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6,
41+
I2C7, I2C8, I2C9, I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ,
42+
LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2,
4343
MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2,
4444
NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3,
4545
NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1,
@@ -48,47 +48,45 @@ patternProperties:
4848
PWM8, PWM9, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3,
4949
RMII4, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12,
5050
SALT13, SALT14, SALT15, SALT16, SALT2, SALT3, SALT4, SALT5,
51-
SALT6, SALT7, SALT8, SALT9, SD1, SD2, SD3, SD3DAT4, SD3DAT5,
52-
SD3DAT6, SD3DAT7, SGPM1, SGPS1, SIOONCTRL, SIOPBI, SIOPBO,
53-
SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1ABR, SPI1CS1,
54-
SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1, TACH10, TACH11,
55-
TACH12, TACH13, TACH14, TACH15, TACH2, TACH3, TACH4, TACH5,
56-
TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2, THRU3, TXD1,
57-
TXD2, TXD3, TXD4, UART10, UART11, UART12, UART13, UART6, UART7,
58-
UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3,
59-
WDTRST4, ]
51+
SALT6, SALT7, SALT8, SALT9, SD1, SD2, SGPM1, SGPS1, SIOONCTRL,
52+
SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1,
53+
SPI1ABR, SPI1CS1, SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1,
54+
TACH10, TACH11, TACH12, TACH13, TACH14, TACH15, TACH2, TACH3,
55+
TACH4, TACH5, TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2,
56+
THRU3, TXD1, TXD2, TXD3, TXD4, UART10, UART11, UART12, UART13,
57+
UART6, UART7, UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2,
58+
WDTRST3, WDTRST4, ]
6059
groups:
6160
allOf:
6261
- $ref: "/schemas/types.yaml#/definitions/string"
6362
- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
64-
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, ESPI,
65-
ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWQSPID, FWSPIWP, GPIT0,
66-
GPIT1, GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1,
67-
GPIU2, GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, HVI3C3, HVI3C4, I2C1,
68-
I2C10, I2C11, I2C12, I2C13, I2C14, I2C15, I2C16, I2C2, I2C3,
69-
I2C4, I2C5, I2C6, I2C7, I2C8, I2C9, I3C3, I3C4, I3C5, I3C6,
70-
JTAGM, LHPD, LHSIRQ, LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ,
71-
MACLINK1, MACLINK2, MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3,
72-
MDIO4, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4,
73-
NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1,
74-
NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE,
75-
PWM0, PWM1, PWM10G0, PWM10G1, PWM11G0, PWM11G1, PWM12G0, PWM12G1,
76-
PWM13G0, PWM13G1, PWM14G0, PWM14G1, PWM15G0, PWM15G1, PWM2, PWM3,
77-
PWM4, PWM5, PWM6, PWM7, PWM8G0, PWM8G1, PWM9G0, PWM9G1, QSPI1,
78-
QSPI2, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3,
79-
RMII4, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10G0, SALT10G1,
80-
SALT11G0, SALT11G1, SALT12G0, SALT12G1, SALT13G0, SALT13G1,
81-
SALT14G0, SALT14G1, SALT15G0, SALT15G1, SALT16G0, SALT16G1,
82-
SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9G0,
83-
SALT9G1, SD1, SD2, SD3, SD3DAT4, SD3DAT5, SD3DAT6, SD3DAT7,
84-
SGPM1, SGPS1, SIOONCTRL, SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD,
85-
SIOS3, SIOS5, SIOSCI, SPI1, SPI1ABR, SPI1CS1, SPI1WP, SPI2,
86-
SPI2CS1, SPI2CS2, TACH0, TACH1, TACH10, TACH11, TACH12, TACH13,
87-
TACH14, TACH15, TACH2, TACH3, TACH4, TACH5, TACH6, TACH7, TACH8,
88-
TACH9, THRU0, THRU1, THRU2, THRU3, TXD1, TXD2, TXD3, TXD4,
89-
UART10, UART11, UART12G0, UART12G1, UART13G0, UART13G1, UART6,
90-
UART7, UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3,
91-
WDTRST4, ]
63+
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMCG1,
64+
EMMCG4, EMMCG8, ESPI, ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID,
65+
FWQSPID, FWSPIWP, GPIT0, GPIT1, GPIT2, GPIT3, GPIT4, GPIT5,
66+
GPIT6, GPIT7, GPIU0, GPIU1, GPIU2, GPIU3, GPIU4, GPIU5, GPIU6,
67+
GPIU7, HVI3C3, HVI3C4, I2C1, I2C10, I2C11, I2C12, I2C13, I2C14,
68+
I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6, I2C7, I2C8, I2C9,
69+
I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ, LPC, LPCHC, LPCPD,
70+
LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2, MACLINK3, MACLINK4,
71+
MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1,
72+
NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2,
73+
NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4,
74+
OSCCLK, PEWAKE, PWM0, PWM1, PWM10G0, PWM10G1, PWM11G0, PWM11G1,
75+
PWM12G0, PWM12G1, PWM13G0, PWM13G1, PWM14G0, PWM14G1, PWM15G0,
76+
PWM15G1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, PWM8G0, PWM8G1,
77+
PWM9G0, PWM9G1, QSPI1, QSPI2, RGMII1, RGMII2, RGMII3, RGMII4,
78+
RMII1, RMII2, RMII3, RMII4, RXD1, RXD2, RXD3, RXD4, SALT1,
79+
SALT10G0, SALT10G1, SALT11G0, SALT11G1, SALT12G0, SALT12G1,
80+
SALT13G0, SALT13G1, SALT14G0, SALT14G1, SALT15G0, SALT15G1,
81+
SALT16G0, SALT16G1, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7,
82+
SALT8, SALT9G0, SALT9G1, SD1, SD2, SD3, SGPM1, SGPS1, SIOONCTRL,
83+
SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1,
84+
SPI1ABR, SPI1CS1, SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1,
85+
TACH10, TACH11, TACH12, TACH13, TACH14, TACH15, TACH2, TACH3,
86+
TACH4, TACH5, TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2,
87+
THRU3, TXD1, TXD2, TXD3, TXD4, UART10, UART11, UART12G0,
88+
UART12G1, UART13G0, UART13G1, UART6, UART7, UART8, UART9, VB,
89+
VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, WDTRST4, ]
9290

9391
required:
9492
- compatible

Documentation/devicetree/bindings/regulator/fixed-regulator.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,8 @@ if:
3030
properties:
3131
compatible:
3232
enum:
33-
- const: regulator-fixed
34-
- const: regulator-fixed-clock
33+
- regulator-fixed
34+
- regulator-fixed-clock
3535

3636
regulator-name: true
3737

Documentation/devicetree/bindings/riscv/cpus.yaml

Lines changed: 13 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -24,15 +24,17 @@ description: |
2424
2525
properties:
2626
compatible:
27-
items:
28-
- enum:
29-
- sifive,rocket0
30-
- sifive,e5
31-
- sifive,e51
32-
- sifive,u54-mc
33-
- sifive,u54
34-
- sifive,u5
35-
- const: riscv
27+
oneOf:
28+
- items:
29+
- enum:
30+
- sifive,rocket0
31+
- sifive,e5
32+
- sifive,e51
33+
- sifive,u54-mc
34+
- sifive,u54
35+
- sifive,u5
36+
- const: riscv
37+
- const: riscv # Simulator only
3638
description:
3739
Identifies that the hart uses the RISC-V instruction set
3840
and identifies the type of the hart.
@@ -66,12 +68,8 @@ properties:
6668
insensitive, letters in the riscv,isa string must be all
6769
lowercase to simplify parsing.
6870

69-
timebase-frequency:
70-
type: integer
71-
minimum: 1
72-
description:
73-
Specifies the clock frequency of the system timer in Hz.
74-
This value is common to all harts on a single system image.
71+
# RISC-V requires 'timebase-frequency' in /cpus, so disallow it here
72+
timebase-frequency: false
7573

7674
interrupt-controller:
7775
type: object
@@ -93,7 +91,6 @@ properties:
9391

9492
required:
9593
- riscv,isa
96-
- timebase-frequency
9794
- interrupt-controller
9895

9996
examples:

Documentation/networking/device_drivers/intel/e100.rst

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
.. SPDX-License-Identifier: GPL-2.0+
22
3-
==============================================================
4-
Linux* Base Driver for the Intel(R) PRO/100 Family of Adapters
5-
==============================================================
3+
=============================================================
4+
Linux Base Driver for the Intel(R) PRO/100 Family of Adapters
5+
=============================================================
66

77
June 1, 2018
88

@@ -21,7 +21,7 @@ Contents
2121
In This Release
2222
===============
2323

24-
This file describes the Linux* Base Driver for the Intel(R) PRO/100 Family of
24+
This file describes the Linux Base Driver for the Intel(R) PRO/100 Family of
2525
Adapters. This driver includes support for Itanium(R)2-based systems.
2626

2727
For questions related to hardware requirements, refer to the documentation
@@ -138,9 +138,9 @@ version 1.6 or later is required for this functionality.
138138
The latest release of ethtool can be found from
139139
https://www.kernel.org/pub/software/network/ethtool/
140140

141-
Enabling Wake on LAN* (WoL)
142-
---------------------------
143-
WoL is provided through the ethtool* utility. For instructions on
141+
Enabling Wake on LAN (WoL)
142+
--------------------------
143+
WoL is provided through the ethtool utility. For instructions on
144144
enabling WoL with ethtool, refer to the ethtool man page. WoL will be
145145
enabled on the system during the next shut down or reboot. For this
146146
driver version, in order to enable WoL, the e100 driver must be loaded

Documentation/networking/device_drivers/intel/e1000.rst

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
.. SPDX-License-Identifier: GPL-2.0+
22
3-
===========================================================
4-
Linux* Base Driver for Intel(R) Ethernet Network Connection
5-
===========================================================
3+
==========================================================
4+
Linux Base Driver for Intel(R) Ethernet Network Connection
5+
==========================================================
66

77
Intel Gigabit Linux driver.
88
Copyright(c) 1999 - 2013 Intel Corporation.
@@ -438,10 +438,10 @@ ethtool
438438
The latest release of ethtool can be found from
439439
https://www.kernel.org/pub/software/network/ethtool/
440440

441-
Enabling Wake on LAN* (WoL)
442-
---------------------------
441+
Enabling Wake on LAN (WoL)
442+
--------------------------
443443

444-
WoL is configured through the ethtool* utility.
444+
WoL is configured through the ethtool utility.
445445

446446
WoL will be enabled on the system during the next shut down or reboot.
447447
For this driver version, in order to enable WoL, the e1000 driver must be

0 commit comments

Comments
 (0)