[llvm] Fix duplicate word typos. NFC

Those fixes were taken from https://reviews.llvm.org/D137338

Author: MaskRay

llvm/docs/PDB/DbiStream.rst

@@ -210,7 +210,7 @@ record in the array has the format:
   uint16_t Dirty : 1;
   // ``true`` if EC information is present for this module. EC is presumed to
   // stand for "Edit & Continue", which LLVM does not support.  So this flag
-  // will always be be false.
+  // will always be false.
   uint16_t EC : 1;
   uint16_t Unused : 6;
   // Type Server Index for this module.  This is assumed to be related to /Zi,

llvm/include/llvm/ADT/CombinationGenerator.h

@@ -73,7 +73,7 @@ class CombinationGenerator {
     SmallVector<WrappingIterator<choice_type>, variable_smallsize>
         VariablesState;
 
-    // 'increment' of the the whole VariablesState is defined identically to the
+    // 'increment' of the whole VariablesState is defined identically to the
     // increment of a number: starting from the least significant element,
     // increment it, and if it wrapped, then propagate that carry by also
     // incrementing next (more significant) element.

llvm/include/llvm/ADT/FloatingPointMode.h

@@ -197,7 +197,7 @@ parseDenormalFPAttributeComponent(StringRef Str) {
       .Default(DenormalMode::Invalid);
 }
 
-/// Return the name used for the denormal handling mode used by the the
+/// Return the name used for the denormal handling mode used by the
 /// expected names from the denormal-fp-math attribute.
 inline StringRef denormalModeKindName(DenormalMode::DenormalModeKind Mode) {
   switch (Mode) {

llvm/include/llvm/ADT/IntervalMap.h

@@ -1221,7 +1221,7 @@ branchRoot(unsigned Position) {
   unsigned size[Nodes];
   IdxPair NewOffset(0, Position);
 
-  // Is is very common for the root node to be smaller than external nodes.
+  // It is very common for the root node to be smaller than external nodes.
   if (Nodes == 1)
     size[0] = rootSize;
   else
@@ -1262,7 +1262,7 @@ splitRoot(unsigned Position) {
   unsigned Size[Nodes];
   IdxPair NewOffset(0, Position);
 
-  // Is is very common for the root node to be smaller than external nodes.
+  // It is very common for the root node to be smaller than external nodes.
   if (Nodes == 1)
     Size[0] = rootSize;
   else
@@ -1814,7 +1814,7 @@ iterator::insertNode(unsigned Level, IntervalMapImpl::NodeRef Node, KeyT Stop) {
 
   // Insert into the branch node at Level-1.
   if (P.size(Level) == Branch::Capacity) {
-    // Branch node is full, handle handle the overflow.
+    // Branch node is full, handle the overflow.
     assert(!SplitRoot && "Cannot overflow after splitting the root");
     SplitRoot = overflow<Branch>(Level);
     Level += SplitRoot;

llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h

@@ -1382,7 +1382,7 @@ template <class BT> void BlockFrequencyInfoImpl<BT>::applyIterativeInference() {
   if (ReachableBlocks.empty())
     return;
 
-  // The map is used to to index successors/predecessors of reachable blocks in
+  // The map is used to index successors/predecessors of reachable blocks in
   // the ReachableBlocks vector
   DenseMap<const BlockT *, size_t> BlockIndex;
   // Extract initial frequencies for the reachable blocks

llvm/include/llvm/Analysis/GuardUtils.h

@@ -49,7 +49,7 @@ bool parseWidenableBranch(const User *U, Value *&Condition,
                           Value *&WidenableCondition, BasicBlock *&IfTrueBB,
                           BasicBlock *&IfFalseBB);
 
-/// Analgous to the above, but return the Uses so that that they can be
+/// Analogous to the above, but return the Uses so that they can be
 /// modified. Unlike previous version, Condition is optional and may be null.
 bool parseWidenableBranch(User *U, Use *&Cond, Use *&WC, BasicBlock *&IfTrueBB,
                           BasicBlock *&IfFalseBB);

llvm/include/llvm/Analysis/ScalarEvolution.h

@@ -328,7 +328,7 @@ class SCEVWrapPredicate final : public SCEVPredicate {
   /// If Signed is a function that takes an n-bit tuple and maps to the
   /// integer domain as the tuples value interpreted as twos complement,
   /// and Unsigned a function that takes an n-bit tuple and maps to the
-  /// integer domain as as the base two value of input tuple, then a + b
+  /// integer domain as the base two value of input tuple, then a + b
   /// has IncrementNUSW iff:
   ///
   /// 0 <= Unsigned(a) + Signed(b) < 2^n

llvm/include/llvm/AsmParser/Parser.h

@@ -97,7 +97,7 @@ ParsedModuleAndIndex parseAssemblyFileWithIndexNoUpgradeDebugInfo(
 
 /// This function is a main interface to the LLVM Assembly Parser. It parses
 /// an ASCII file that (presumably) contains LLVM Assembly code for a module
-/// summary. It returns a a ModuleSummaryIndex with the corresponding features.
+/// summary. It returns a ModuleSummaryIndex with the corresponding features.
 /// Note that this does not verify that the generated Index is valid, so you
 /// should run the verifier after parsing the file to check that it is okay.
 /// Parse LLVM Assembly Index from a file

llvm/include/llvm/BinaryFormat/MachO.h

@@ -1073,7 +1073,7 @@ struct dyld_chained_fixups_header {
 };
 
 /// dyld_chained_starts_in_image is embedded in LC_DYLD_CHAINED_FIXUPS payload.
-/// Each each seg_info_offset entry is the offset into this struct for that
+/// Each seg_info_offset entry is the offset into this struct for that
 /// segment followed by pool of dyld_chain_starts_in_segment data.
 struct dyld_chained_starts_in_image {
   uint32_t seg_count;

llvm/include/llvm/CodeGen/CodeGenPassBuilder.h

@@ -288,7 +288,7 @@ template <typename DerivedT> class CodeGenPassBuilder {
   /// all virtual registers.
   ///
   /// Note if the target overloads addRegAssignAndRewriteOptimized, this may not
-  /// be honored. This is also not generally used for the the fast variant,
+  /// be honored. This is also not generally used for the fast variant,
   /// where the allocation and rewriting are done in one pass.
   void addPreRewrite(AddMachinePass &) const {}