[FIRRTLToHW] Remove the SYNTHESIS guard in printf/flush lowering path

Author: nanjo712

lib/Conversion/FIRRTLToHW/LowerToHW.cpp

@@ -2963,43 +2963,38 @@ FIRRTLLowering::lowerSimFormatString(StringRef originalFormatString,
 LogicalResult FIRRTLLowering::lowerStatementWithFd(
     const FileDescriptorInfo &fileDescriptor, Value clock, Value cond,
     const std::function<LogicalResult(Value)> &fn, bool usePrintfCond) {
-  // Emit an "#ifndef SYNTHESIS" guard into the always block.
   bool failed = false;
-  circuitState.addMacroDecl(builder.getStringAttr("SYNTHESIS"));
-  addToIfDefBlock("SYNTHESIS", std::function<void()>(), [&]() {
-    addToAlwaysBlock(clock, [&]() {
-      // TODO: This is not printf specific anymore. Replace "Printf" with "FD"
-      // or similar but be aware that changing macro name breaks existing uses.
-      circuitState.usedPrintf = true;
-      if (usePrintfCond)
-        circuitState.addFragment(theModule, "PRINTF_COND_FRAGMENT");
-
-      // Emit an "sv.if '`PRINTF_COND_ & cond' into the #ifndef.
-      Value ifCond = cond;
-      if (usePrintfCond) {
-        ifCond =
-            sv::MacroRefExprOp::create(builder, cond.getType(), "PRINTF_COND_");
-        ifCond = builder.createOrFold<comb::AndOp>(ifCond, cond, true);
-      }
+  addToAlwaysBlock(clock, [&]() {
+    // TODO: This is not printf specific anymore. Replace "Printf" with "FD"
+    // or similar but be aware that changing macro name breaks existing uses.
+    circuitState.usedPrintf = true;
+    if (usePrintfCond)
+      circuitState.addFragment(theModule, "PRINTF_COND_FRAGMENT");
+
+    Value ifCond = cond;
+    if (usePrintfCond) {
+      ifCond =
+          sv::MacroRefExprOp::create(builder, cond.getType(), "PRINTF_COND_");
+      ifCond = builder.createOrFold<comb::AndOp>(ifCond, cond, true);
+    }
 
-      addIfProceduralBlock(ifCond, [&]() {
-        // `fd`represents a file decriptor. Use the stdout or the one opened
-        // using $fopen.
-        Value fd;
-        if (fileDescriptor.isDefaultFd()) {
-          // Emit the sv.fwrite, writing to stderr by default.
-          fd = hw::ConstantOp::create(builder, APInt(32, 0x80000002));
-        } else {
-          // Call the library function to get the FD.
-          auto fdOrError = callFileDescriptorLib(fileDescriptor);
-          if (llvm::failed(fdOrError)) {
-            failed = true;
-            return;
-          }
-          fd = *fdOrError;
+    addIfProceduralBlock(ifCond, [&]() {
+      // `fd`represents a file decriptor. Use the stdout or the one opened
+      // using $fopen.
+      Value fd;
+      if (fileDescriptor.isDefaultFd()) {
+        // Emit the sv.fwrite, writing to stderr by default.
+        fd = hw::ConstantOp::create(builder, APInt(32, 0x80000002));
+      } else {
+        // Call the library function to get the FD.
+        auto fdOrError = callFileDescriptorLib(fileDescriptor);
+        if (llvm::failed(fdOrError)) {
+          failed = true;
+          return;
         }
-        failed = llvm::failed(fn(fd));
-      });
+        fd = *fdOrError;
+      }
+      failed = llvm::failed(fn(fd));
     });
   });
   return failure(failed);

lib/Conversion/Utils/SVLoweringUtils.cpp

@@ -63,6 +63,7 @@ void sv::emitFileDescriptorRuntime(Operation *fileScopeOp,
   auto fragmentSymName =
       ::getFileDescriptorFragmentSymName(builder.getContext());
   auto macroSymName = builder.getStringAttr(kFileDescriptorMacroName);
+  auto synthesisSymName = builder.getStringAttr("SYNTHESIS");
   SymbolTable symbolTable(fileScopeOp);
 
   auto emitGuard = [&](StringRef guard, llvm::function_ref<void(void)> body) {
@@ -95,6 +96,9 @@ void sv::emitFileDescriptorRuntime(Operation *fileScopeOp,
     symbolTable.insert(func);
   }
 
+  if (!symbolTable.lookup(synthesisSymName))
+    symbolTable.insert(sv::MacroDeclOp::create(builder, synthesisSymName));
+
   if (!symbolTable.lookup(macroSymName))
     symbolTable.insert(sv::MacroDeclOp::create(builder, macroSymName));
 

test/Conversion/FIRRTLToHW/lower-to-hw.mlir

@@ -362,9 +362,7 @@ firrtl.circuit "Simple"   attributes {annotations = [{class =
 
     // CHECK: [[ADDSIGNED:%.+]] = comb.add
 
-    // CHECK:      sv.ifdef @SYNTHESIS {
-    // CHECK-NEXT: } else  {
-    // CHECK-NEXT:   sv.always posedge [[CLOCK]] {
+    // CHECK:   sv.always posedge [[CLOCK]] {
     // CHECK-NEXT:     %[[PRINTF_COND:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
     // CHECK-NEXT:     [[AND:%.+]] = comb.and bin %[[PRINTF_COND]], %reset
     // CHECK-NEXT:     sv.if [[AND]] {

test/firtool/lower-layers.fir

@@ -127,12 +127,10 @@ circuit TestHarness:
       define trace = x
 
   ; CHECK: module TestHarness_Verification()
-  ; CHECK:   `ifndef SYNTHESIS
   ; CHECK:     always @(posedge TestHarness.clock) begin
   ; CHECK:       if ((`PRINTF_COND_) & TestHarness.reset)
   ; CHECK:         $fwrite(32'h80000002, "The last PC was: %x", TestHarness.dut.verification.pc_d);
   ; CHECK:     end // always @(posedge)
-  ; CHECK:   `endif // not def SYNTHESIS
   ; CHECK: endmodule
 
   ; CHECK: module TestHarness(