|
1 | | -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 |
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals --version 3 |
2 | 2 | ; RUN: opt -mtriple=x86_64-unknown-linux -S -passes=lowertypetests -lowertypetests-summary-action=import -lowertypetests-read-summary=%S/Inputs/import.yaml %s | FileCheck --check-prefixes=CHECK,X86 %s |
3 | 3 | ; RUN: opt -mtriple=aarch64-unknown-linux -S -passes=lowertypetests -lowertypetests-summary-action=import -lowertypetests-read-summary=%S/Inputs/import.yaml %s | FileCheck --check-prefixes=CHECK,ARM %s |
4 | 4 |
|
5 | 5 | target datalayout = "e-p:64:64" |
6 | 6 |
|
7 | 7 | declare i1 @llvm.type.test(ptr %ptr, metadata %bitset) nounwind readnone |
8 | 8 |
|
9 | | -; CHECK-DAG: @__typeid_single_global_addr = external hidden global [0 x i8], code_model "small" |
10 | | -; CHECK-DAG: @__typeid_inline6_global_addr = external hidden global [0 x i8], code_model "small" |
11 | | -; X86-DAG: @__typeid_inline6_align = external hidden global [0 x i8], !absolute_symbol !0 |
12 | | -; X86-DAG: @__typeid_inline6_size_m1 = external hidden global [0 x i8], !absolute_symbol !1 |
13 | | -; X86-DAG: @__typeid_inline6_inline_bits = external hidden global [0 x i8], !absolute_symbol !2 |
14 | | -; CHECK-DAG: @__typeid_inline5_global_addr = external hidden global [0 x i8], code_model "small" |
15 | | -; X86-DAG: @__typeid_inline5_align = external hidden global [0 x i8], !absolute_symbol !0 |
16 | | -; X86-DAG: @__typeid_inline5_size_m1 = external hidden global [0 x i8], !absolute_symbol !3 |
17 | | -; X86-DAG: @__typeid_inline5_inline_bits = external hidden global [0 x i8], !absolute_symbol !4 |
18 | | -; CHECK-DAG: @__typeid_bytearray32_global_addr = external hidden global [0 x i8], code_model "small" |
19 | | -; X86-DAG: @__typeid_bytearray32_align = external hidden global [0 x i8], !absolute_symbol !0 |
20 | | -; X86-DAG: @__typeid_bytearray32_size_m1 = external hidden global [0 x i8], !absolute_symbol !4 |
21 | | -; CHECK-DAG: @__typeid_bytearray32_byte_array = external hidden global [0 x i8] |
22 | | -; X86-DAG: @__typeid_bytearray32_bit_mask = external hidden global [0 x i8], !absolute_symbol !0 |
23 | | -; CHECK-DAG: @__typeid_bytearray7_global_addr = external hidden global [0 x i8], code_model "small" |
24 | | -; X86-DAG: @__typeid_bytearray7_align = external hidden global [0 x i8], !absolute_symbol !0 |
25 | | -; X86-DAG: @__typeid_bytearray7_size_m1 = external hidden global [0 x i8], !absolute_symbol !5 |
26 | | -; CHECK-DAG: @__typeid_bytearray7_byte_array = external hidden global [0 x i8] |
27 | | -; X86-DAG: @__typeid_bytearray7_bit_mask = external hidden global [0 x i8], !absolute_symbol !0 |
28 | | -; CHECK-DAG: @__typeid_allones32_global_addr = external hidden global [0 x i8], code_model "small" |
29 | | -; X86-DAG: @__typeid_allones32_align = external hidden global [0 x i8], !absolute_symbol !0 |
30 | | -; X86-DAG: @__typeid_allones32_size_m1 = external hidden global [0 x i8], !absolute_symbol !4 |
31 | | -; CHECK-DAG: @__typeid_allones7_global_addr = external hidden global [0 x i8], code_model "small" |
32 | | -; X86-DAG: @__typeid_allones7_align = external hidden global [0 x i8], !absolute_symbol !0 |
33 | | -; X86-DAG: @__typeid_allones7_size_m1 = external hidden global [0 x i8], !absolute_symbol !5 |
34 | 9 |
|
| 10 | +;. |
| 11 | +; X86: @__typeid_single_global_addr = external hidden global [0 x i8], code_model "small" |
| 12 | +; X86: @__typeid_inline6_global_addr = external hidden global [0 x i8], code_model "small" |
| 13 | +; X86: @__typeid_inline6_align = external hidden global [0 x i8], !absolute_symbol [[META0:![0-9]+]] |
| 14 | +; X86: @__typeid_inline6_size_m1 = external hidden global [0 x i8], !absolute_symbol [[META1:![0-9]+]] |
| 15 | +; X86: @__typeid_inline6_inline_bits = external hidden global [0 x i8], !absolute_symbol [[META2:![0-9]+]] |
| 16 | +; X86: @__typeid_inline5_global_addr = external hidden global [0 x i8], code_model "small" |
| 17 | +; X86: @__typeid_inline5_align = external hidden global [0 x i8], !absolute_symbol [[META0]] |
| 18 | +; X86: @__typeid_inline5_size_m1 = external hidden global [0 x i8], !absolute_symbol [[META3:![0-9]+]] |
| 19 | +; X86: @__typeid_inline5_inline_bits = external hidden global [0 x i8], !absolute_symbol [[META4:![0-9]+]] |
| 20 | +; X86: @__typeid_bytearray32_global_addr = external hidden global [0 x i8], code_model "small" |
| 21 | +; X86: @__typeid_bytearray32_align = external hidden global [0 x i8], !absolute_symbol [[META0]] |
| 22 | +; X86: @__typeid_bytearray32_size_m1 = external hidden global [0 x i8], !absolute_symbol [[META4]] |
| 23 | +; X86: @__typeid_bytearray32_byte_array = external hidden global [0 x i8] |
| 24 | +; X86: @__typeid_bytearray32_bit_mask = external hidden global [0 x i8], !absolute_symbol [[META0]] |
| 25 | +; X86: @__typeid_bytearray7_global_addr = external hidden global [0 x i8], code_model "small" |
| 26 | +; X86: @__typeid_bytearray7_align = external hidden global [0 x i8], !absolute_symbol [[META0]] |
| 27 | +; X86: @__typeid_bytearray7_size_m1 = external hidden global [0 x i8], !absolute_symbol [[META5:![0-9]+]] |
| 28 | +; X86: @__typeid_bytearray7_byte_array = external hidden global [0 x i8] |
| 29 | +; X86: @__typeid_bytearray7_bit_mask = external hidden global [0 x i8], !absolute_symbol [[META0]] |
| 30 | +; X86: @__typeid_allones32_global_addr = external hidden global [0 x i8], code_model "small" |
| 31 | +; X86: @__typeid_allones32_align = external hidden global [0 x i8], !absolute_symbol [[META0]] |
| 32 | +; X86: @__typeid_allones32_size_m1 = external hidden global [0 x i8], !absolute_symbol [[META4]] |
| 33 | +; X86: @__typeid_allones7_global_addr = external hidden global [0 x i8], code_model "small" |
| 34 | +; X86: @__typeid_allones7_align = external hidden global [0 x i8], !absolute_symbol [[META0]] |
| 35 | +; X86: @__typeid_allones7_size_m1 = external hidden global [0 x i8], !absolute_symbol [[META5]] |
| 36 | +;. |
| 37 | +; ARM: @__typeid_single_global_addr = external hidden global [0 x i8], code_model "small" |
| 38 | +; ARM: @__typeid_inline6_global_addr = external hidden global [0 x i8], code_model "small" |
| 39 | +; ARM: @__typeid_inline5_global_addr = external hidden global [0 x i8], code_model "small" |
| 40 | +; ARM: @__typeid_bytearray32_global_addr = external hidden global [0 x i8], code_model "small" |
| 41 | +; ARM: @__typeid_bytearray32_byte_array = external hidden global [0 x i8] |
| 42 | +; ARM: @__typeid_bytearray7_global_addr = external hidden global [0 x i8], code_model "small" |
| 43 | +; ARM: @__typeid_bytearray7_byte_array = external hidden global [0 x i8] |
| 44 | +; ARM: @__typeid_allones32_global_addr = external hidden global [0 x i8], code_model "small" |
| 45 | +; ARM: @__typeid_allones7_global_addr = external hidden global [0 x i8], code_model "small" |
| 46 | +;. |
35 | 47 | define i1 @allones7(ptr %p) { |
36 | 48 | ; X86-LABEL: define i1 @allones7( |
37 | 49 | ; X86-SAME: ptr [[P:%.*]]) { |
@@ -81,15 +93,15 @@ define i1 @bytearray7(ptr %p) { |
81 | 93 | ; X86-NEXT: [[TMP2:%.*]] = sub i64 ptrtoint (ptr @__typeid_bytearray7_global_addr to i64), [[TMP1]] |
82 | 94 | ; X86-NEXT: [[TMP7:%.*]] = call i64 @llvm.fshr.i64(i64 [[TMP2]], i64 [[TMP2]], i64 ptrtoint (ptr @__typeid_bytearray7_align to i64)) |
83 | 95 | ; X86-NEXT: [[TMP8:%.*]] = icmp ule i64 [[TMP7]], ptrtoint (ptr @__typeid_bytearray7_size_m1 to i64) |
84 | | -; X86-NEXT: br i1 [[TMP8]], label %[[TMP9:.*]], label %[[TMP14:.*]] |
85 | | -; X86: [[TMP9]]: |
| 96 | +; X86-NEXT: br i1 [[TMP8]], label [[TMP5:%.*]], label [[TMP14:%.*]] |
| 97 | +; X86: 5: |
86 | 98 | ; X86-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr @__typeid_bytearray7_byte_array, i64 [[TMP7]] |
87 | 99 | ; X86-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 1 |
88 | 100 | ; X86-NEXT: [[TMP12:%.*]] = and i8 [[TMP11]], ptrtoint (ptr @__typeid_bytearray7_bit_mask to i8) |
89 | 101 | ; X86-NEXT: [[TMP13:%.*]] = icmp ne i8 [[TMP12]], 0 |
90 | | -; X86-NEXT: br label %[[TMP14]] |
91 | | -; X86: [[TMP14]]: |
92 | | -; X86-NEXT: [[TMP15:%.*]] = phi i1 [ false, [[TMP0:%.*]] ], [ [[TMP13]], %[[TMP9]] ] |
| 102 | +; X86-NEXT: br label [[TMP14]] |
| 103 | +; X86: 10: |
| 104 | +; X86-NEXT: [[TMP15:%.*]] = phi i1 [ false, [[TMP0:%.*]] ], [ [[TMP13]], [[TMP5]] ] |
93 | 105 | ; X86-NEXT: ret i1 [[TMP15]] |
94 | 106 | ; |
95 | 107 | ; ARM-LABEL: define i1 @bytearray7( |
@@ -120,15 +132,15 @@ define i1 @bytearray32(ptr %p) { |
120 | 132 | ; X86-NEXT: [[TMP2:%.*]] = sub i64 ptrtoint (ptr @__typeid_bytearray32_global_addr to i64), [[TMP1]] |
121 | 133 | ; X86-NEXT: [[TMP7:%.*]] = call i64 @llvm.fshr.i64(i64 [[TMP2]], i64 [[TMP2]], i64 ptrtoint (ptr @__typeid_bytearray32_align to i64)) |
122 | 134 | ; X86-NEXT: [[TMP8:%.*]] = icmp ule i64 [[TMP7]], ptrtoint (ptr @__typeid_bytearray32_size_m1 to i64) |
123 | | -; X86-NEXT: br i1 [[TMP8]], label %[[TMP9:.*]], label %[[TMP14:.*]] |
124 | | -; X86: [[TMP9]]: |
| 135 | +; X86-NEXT: br i1 [[TMP8]], label [[TMP5:%.*]], label [[TMP14:%.*]] |
| 136 | +; X86: 5: |
125 | 137 | ; X86-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr @__typeid_bytearray32_byte_array, i64 [[TMP7]] |
126 | 138 | ; X86-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 1 |
127 | 139 | ; X86-NEXT: [[TMP12:%.*]] = and i8 [[TMP11]], ptrtoint (ptr @__typeid_bytearray32_bit_mask to i8) |
128 | 140 | ; X86-NEXT: [[TMP13:%.*]] = icmp ne i8 [[TMP12]], 0 |
129 | | -; X86-NEXT: br label %[[TMP14]] |
130 | | -; X86: [[TMP14]]: |
131 | | -; X86-NEXT: [[TMP15:%.*]] = phi i1 [ false, [[TMP0:%.*]] ], [ [[TMP13]], %[[TMP9]] ] |
| 141 | +; X86-NEXT: br label [[TMP14]] |
| 142 | +; X86: 10: |
| 143 | +; X86-NEXT: [[TMP15:%.*]] = phi i1 [ false, [[TMP0:%.*]] ], [ [[TMP13]], [[TMP5]] ] |
132 | 144 | ; X86-NEXT: ret i1 [[TMP15]] |
133 | 145 | ; |
134 | 146 | ; ARM-LABEL: define i1 @bytearray32( |
@@ -159,16 +171,16 @@ define i1 @inline5(ptr %p) { |
159 | 171 | ; X86-NEXT: [[TMP2:%.*]] = sub i64 ptrtoint (ptr @__typeid_inline5_global_addr to i64), [[TMP1]] |
160 | 172 | ; X86-NEXT: [[TMP7:%.*]] = call i64 @llvm.fshr.i64(i64 [[TMP2]], i64 [[TMP2]], i64 ptrtoint (ptr @__typeid_inline5_align to i64)) |
161 | 173 | ; X86-NEXT: [[TMP8:%.*]] = icmp ule i64 [[TMP7]], ptrtoint (ptr @__typeid_inline5_size_m1 to i64) |
162 | | -; X86-NEXT: br i1 [[TMP8]], label %[[TMP9:.*]], label %[[TMP15:.*]] |
163 | | -; X86: [[TMP9]]: |
| 174 | +; X86-NEXT: br i1 [[TMP8]], label [[TMP5:%.*]], label [[TMP15:%.*]] |
| 175 | +; X86: 5: |
164 | 176 | ; X86-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP7]] to i32 |
165 | 177 | ; X86-NEXT: [[TMP11:%.*]] = and i32 [[TMP10]], 31 |
166 | 178 | ; X86-NEXT: [[TMP12:%.*]] = shl i32 1, [[TMP11]] |
167 | 179 | ; X86-NEXT: [[TMP13:%.*]] = and i32 ptrtoint (ptr @__typeid_inline5_inline_bits to i32), [[TMP12]] |
168 | 180 | ; X86-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
169 | | -; X86-NEXT: br label %[[TMP15]] |
170 | | -; X86: [[TMP15]]: |
171 | | -; X86-NEXT: [[TMP16:%.*]] = phi i1 [ false, [[TMP0:%.*]] ], [ [[TMP14]], %[[TMP9]] ] |
| 181 | +; X86-NEXT: br label [[TMP15]] |
| 182 | +; X86: 11: |
| 183 | +; X86-NEXT: [[TMP16:%.*]] = phi i1 [ false, [[TMP0:%.*]] ], [ [[TMP14]], [[TMP5]] ] |
172 | 184 | ; X86-NEXT: ret i1 [[TMP16]] |
173 | 185 | ; |
174 | 186 | ; ARM-LABEL: define i1 @inline5( |
@@ -200,15 +212,15 @@ define i1 @inline6(ptr %p) { |
200 | 212 | ; X86-NEXT: [[TMP2:%.*]] = sub i64 ptrtoint (ptr @__typeid_inline6_global_addr to i64), [[TMP1]] |
201 | 213 | ; X86-NEXT: [[TMP7:%.*]] = call i64 @llvm.fshr.i64(i64 [[TMP2]], i64 [[TMP2]], i64 ptrtoint (ptr @__typeid_inline6_align to i64)) |
202 | 214 | ; X86-NEXT: [[TMP8:%.*]] = icmp ule i64 [[TMP7]], ptrtoint (ptr @__typeid_inline6_size_m1 to i64) |
203 | | -; X86-NEXT: br i1 [[TMP8]], label %[[TMP9:.*]], label %[[TMP14:.*]] |
204 | | -; X86: [[TMP9]]: |
| 215 | +; X86-NEXT: br i1 [[TMP8]], label [[TMP5:%.*]], label [[TMP14:%.*]] |
| 216 | +; X86: 5: |
205 | 217 | ; X86-NEXT: [[TMP10:%.*]] = and i64 [[TMP7]], 63 |
206 | 218 | ; X86-NEXT: [[TMP11:%.*]] = shl i64 1, [[TMP10]] |
207 | 219 | ; X86-NEXT: [[TMP12:%.*]] = and i64 ptrtoint (ptr @__typeid_inline6_inline_bits to i64), [[TMP11]] |
208 | 220 | ; X86-NEXT: [[TMP13:%.*]] = icmp ne i64 [[TMP12]], 0 |
209 | | -; X86-NEXT: br label %[[TMP14]] |
210 | | -; X86: [[TMP14]]: |
211 | | -; X86-NEXT: [[TMP15:%.*]] = phi i1 [ false, [[TMP0:%.*]] ], [ [[TMP13]], %[[TMP9]] ] |
| 221 | +; X86-NEXT: br label [[TMP14]] |
| 222 | +; X86: 10: |
| 223 | +; X86-NEXT: [[TMP15:%.*]] = phi i1 [ false, [[TMP0:%.*]] ], [ [[TMP13]], [[TMP5]] ] |
212 | 224 | ; X86-NEXT: ret i1 [[TMP15]] |
213 | 225 | ; |
214 | 226 | ; ARM-LABEL: define i1 @inline6( |
@@ -249,3 +261,17 @@ define i1 @single(ptr %p) { |
249 | 261 | ; X86: !3 = !{i64 0, i64 32} |
250 | 262 | ; X86: !4 = !{i64 0, i64 4294967296} |
251 | 263 | ; X86: !5 = !{i64 0, i64 128} |
| 264 | +;. |
| 265 | +; X86: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } |
| 266 | +; X86: attributes #[[ATTR1:[0-9]+]] = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) } |
| 267 | +;. |
| 268 | +; X86: [[META0]] = !{i64 0, i64 256} |
| 269 | +; X86: [[META1]] = !{i64 0, i64 64} |
| 270 | +; X86: [[META2]] = !{i64 -1, i64 -1} |
| 271 | +; X86: [[META3]] = !{i64 0, i64 32} |
| 272 | +; X86: [[META4]] = !{i64 0, i64 4294967296} |
| 273 | +; X86: [[META5]] = !{i64 0, i64 128} |
| 274 | +;. |
| 275 | +; ARM: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } |
| 276 | +; ARM: attributes #[[ATTR1:[0-9]+]] = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) } |
| 277 | +;. |
0 commit comments