[LoongArch] Unable to constrain instruction placement when using the large code model

[wangleiat]

@.str = external hidden unnamed_addr constant [1 x i8], align 1

declare void @callee1(ptr, i64, ptr, i32 signext)
declare void @callee2(ptr, i64, ptr, i32 signext)
declare void @callee3(ptr, ptr, i32 signext)

define dso_local void @caller(ptr %0) {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %17, label %3

3:                                                ; preds = %1
  %4 = getelementptr inbounds nuw i8, ptr %0, i64 16
  %5 = load i32, ptr %4, align 8
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %7, label %16

7:                                                ; preds = %3
  %8 = getelementptr inbounds nuw i8, ptr %0, i64 20
  %9 = load i32, ptr %8, align 4
  %10 = icmp eq i32 %9, 0
  %11 = load ptr, ptr %0, align 8
  %12 = getelementptr inbounds nuw i8, ptr %0, i64 40
  %13 = load i64, ptr %12, align 8
  br i1 %10, label %15, label %14

14:                                               ; preds = %7
  tail call void @callee1(ptr %11, i64 %13, ptr @.str, i32 signext 0)
  br label %16

15:                                               ; preds = %7
  tail call void @callee2(ptr %11, i64 %13, ptr @.str, i32 signext 0)
  br label %16

16:                                               ; preds = %15, %14, %3
  tail call void @callee3(ptr %0, ptr @.str, i32 signext 0)
  br label %17

17:                                               ; preds = %16, %1
  ret void
}

llc -mtriple=loongarch64 -code-model=large xxx.ll

LoongArchInstrInfo::isSchedulingBoundary cannot constrain the instruction movement performed by the branch-folder pass.

By the way, it also cannot constrain instruction movement in the post-RA scheduler.

[llvmbot]

@llvm/issue-subscribers-backend-loongarch

Author: wanglei (wangleiat)

```llvm @.str = external hidden unnamed_addr constant [1 x i8], align 1

declare void @callee1(ptr, i64, ptr, i32 signext)
declare void @callee2(ptr, i64, ptr, i32 signext)
declare void @callee3(ptr, ptr, i32 signext)

define dso_local void @caller(ptr %0) {
%2 = icmp eq ptr %0, null
br i1 %2, label %17, label %3

3: ; preds = %1
%4 = getelementptr inbounds nuw i8, ptr %0, i64 16
%5 = load i32, ptr %4, align 8
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %16

7: ; preds = %3
%8 = getelementptr inbounds nuw i8, ptr %0, i64 20
%9 = load i32, ptr %8, align 4
%10 = icmp eq i32 %9, 0
%11 = load ptr, ptr %0, align 8
%12 = getelementptr inbounds nuw i8, ptr %0, i64 40
%13 = load i64, ptr %12, align 8
br i1 %10, label %15, label %14

14: ; preds = %7
tail call void @callee1(ptr %11, i64 %13, ptr @.str, i32 signext 0)
br label %16

15: ; preds = %7
tail call void @callee2(ptr %11, i64 %13, ptr @.str, i32 signext 0)
br label %16

16: ; preds = %15, %14, %3
tail call void @callee3(ptr %0, ptr @.str, i32 signext 0)
br label %17

17: ; preds = %16, %1
ret void
}

llc -mtriple=loongarch64 -code-model=large xxx.ll

`LoongArchInstrInfo::isSchedulingBoundary` cannot constrain the instruction movement performed by the `branch-folder` pass.

By the way, it also cannot constrain instruction movement in the `post-RA scheduler`.
</details>

[wangleiat]

@zhaoqi5 @SixWeining

[heiher]

Good catch! The branch-folder pass moves machine instructions around like a scheduler, so it should also respect backend scheduling boundaries. I'll submit a patch to fix that.

By the way, does the post-RA scheduler pass have any reproducible case? I noticed that its code calls isSchedulingBoundary.

[zhaoqi5]

By the way, does the post-RA scheduler pass have any reproducible case? I noticed that its code calls isSchedulingBoundary.

post-RA scheduler returns directly without any change because of lacking of scheduling model on LoongArch. So this issue will not happen before we adding the scheduling model.

We can override TargetSubtargetInfo::enablePostRAScheduler() in LoongArchSubtarget.h and make it simplily reture true to force running the post-RA scheduler. After this, several such cases can be found in existing codegen tests for LoongArch (such as merge-base-offset.ll, vector-fp-imm.ll, ...).

[zhaoqi5]

By the way, does the post-RA scheduler pass have any reproducible case? I noticed that its code calls isSchedulingBoundary.

post-RA scheduler returns directly without any change because of lacking of scheduling model on LoongArch. So this issue will not happen before we adding the scheduling model.

We can override TargetSubtargetInfo::enablePostRAScheduler() in LoongArchSubtarget.h and make it simplily reture true to force running the post-RA scheduler. After this, several such cases can be found in existing codegen tests for LoongArch (such as merge-base-offset.ll, vector-fp-imm.ll, ...).

eh... I am sorry I make a mistake. These changed cases are not for large code model and are just because relax is not added for llc in the tests.

So It is not sure whether this issue happens in the post-RA scheduler. More investigation needed.